\doxysection{stm32h7xx\+\_\+hal\+\_\+tim.\+h}
\hypertarget{stm32h7xx__hal__tim_8h_source}{}\label{stm32h7xx__hal__tim_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_tim.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_tim.h}}
\mbox{\hyperlink{stm32h7xx__hal__tim_8h}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
\DoxyCodeLine{00001\ }
\DoxyCodeLine{00018\ }
\DoxyCodeLine{00019\ \textcolor{comment}{/*\ Define\ to\ prevent\ recursive\ inclusion\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00020\ \textcolor{preprocessor}{\#ifndef\ STM32H7xx\_HAL\_TIM\_H}}
\DoxyCodeLine{00021\ \textcolor{preprocessor}{\#define\ STM32H7xx\_HAL\_TIM\_H}}
\DoxyCodeLine{00022\ }
\DoxyCodeLine{00023\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{00024\ \textcolor{keyword}{extern}\ \textcolor{stringliteral}{"{}C"{}}\ \{}
\DoxyCodeLine{00025\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00026\ }
\DoxyCodeLine{00027\ \textcolor{comment}{/*\ Includes\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00028\ \textcolor{preprocessor}{\#include\ "{}\mbox{\hyperlink{stm32h7xx__hal__def_8h}{stm32h7xx\_hal\_def.h}}"{}}}
\DoxyCodeLine{00029\ }
\DoxyCodeLine{00033\ }
\DoxyCodeLine{00037\ }
\DoxyCodeLine{00038\ \textcolor{comment}{/*\ Exported\ types\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00042\ }
\DoxyCodeLine{00046\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00047\ \{}
\DoxyCodeLine{00048\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def_afc886119e6709bb576d25b5cf8d12d92}{Prescaler}};\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00050\ }
\DoxyCodeLine{00051\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def_a16d0c02a8f35426360a64c0706656e35}{CounterMode}};\ \ \ \ \ \ \ }
\DoxyCodeLine{00053\ }
\DoxyCodeLine{00054\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def_a8fab2bc184bb756763ff59c729b5be55}{Period}};\ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00057\ }
\DoxyCodeLine{00058\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def_ade59c3a547a5409da845592f30596d17}{ClockDivision}};\ \ \ \ \ }
\DoxyCodeLine{00060\ }
\DoxyCodeLine{00061\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def_aa949328175500fd1d112f64a4db5ae79}{RepetitionCounter}};\ \ }
\DoxyCodeLine{00071\ }
\DoxyCodeLine{00072\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def_a29e7b91a384f12e6be0f3ffb62ea1ea7}{AutoReloadPreload}};\ \ }
\DoxyCodeLine{00074\ \}\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def}{TIM\_Base\_InitTypeDef}};}
\DoxyCodeLine{00075\ }
\DoxyCodeLine{00079\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00080\ \{}
\DoxyCodeLine{00081\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_ae5faa1cba0b3f1ab6179cc54e1015ee8}{OCMode}};\ \ \ \ \ \ \ \ }
\DoxyCodeLine{00083\ }
\DoxyCodeLine{00084\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a61fb5b9ef4154de67620ac81085a0e39}{Pulse}};\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00086\ }
\DoxyCodeLine{00087\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a556b7137d041aceed3e45c87cbfb39cd}{OCPolarity}};\ \ \ \ }
\DoxyCodeLine{00089\ }
\DoxyCodeLine{00090\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a21922d8e2fee659d081c4be4c500d1d4}{OCNPolarity}};\ \ \ }
\DoxyCodeLine{00093\ }
\DoxyCodeLine{00094\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a4c4203c5ed779ac86fb793bb9d628e55}{OCFastMode}};\ \ \ \ }
\DoxyCodeLine{00097\ }
\DoxyCodeLine{00098\ }
\DoxyCodeLine{00099\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_ace3e2b76ca2fca0f4961585ed9ebecf5}{OCIdleState}};\ \ \ }
\DoxyCodeLine{00102\ }
\DoxyCodeLine{00103\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def_a0d70cc51990d7433fd76cc6ed1d06237}{OCNIdleState}};\ \ }
\DoxyCodeLine{00106\ \}\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def}{TIM\_OC\_InitTypeDef}};}
\DoxyCodeLine{00107\ }
\DoxyCodeLine{00111\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00112\ \{}
\DoxyCodeLine{00113\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_af127f01162853e39ae616b43cc52b674}{OCMode}};\ \ \ \ \ \ \ \ }
\DoxyCodeLine{00115\ }
\DoxyCodeLine{00116\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_a4f1fbf6d60812c3194e9ee8a05f5cfa6}{Pulse}};\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00118\ }
\DoxyCodeLine{00119\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_a3028787ad41698072cbf70ddf1b6c984}{OCPolarity}};\ \ \ \ }
\DoxyCodeLine{00121\ }
\DoxyCodeLine{00122\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_a00deac6c3347b0482955d936351c6388}{OCNPolarity}};\ \ \ }
\DoxyCodeLine{00125\ }
\DoxyCodeLine{00126\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_aef11bcea1dbf3e3ddf2a4bbc2846bb1e}{OCIdleState}};\ \ \ }
\DoxyCodeLine{00129\ }
\DoxyCodeLine{00130\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_a37bc0a680d53458bf4c42ebb277b0c2c}{OCNIdleState}};\ \ }
\DoxyCodeLine{00133\ }
\DoxyCodeLine{00134\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_a8589cf95218ea62604b845054b36b772}{ICPolarity}};\ \ \ \ }
\DoxyCodeLine{00136\ }
\DoxyCodeLine{00137\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_a9e8853f17e85393a869aa2ecb315f030}{ICSelection}};\ \ \ }
\DoxyCodeLine{00139\ }
\DoxyCodeLine{00140\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def_a883e69dec14d8bde9914906be1b04ad7}{ICFilter}};\ \ \ \ \ \ }
\DoxyCodeLine{00142\ \}\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def}{TIM\_OnePulse\_InitTypeDef}};}
\DoxyCodeLine{00143\ }
\DoxyCodeLine{00147\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00148\ \{}
\DoxyCodeLine{00149\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___i_c___init_type_def_ab122383ebc0926c49a814546471da9b3}{ICPolarity}};\ \ }
\DoxyCodeLine{00151\ }
\DoxyCodeLine{00152\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___i_c___init_type_def_aad80556490de79727ba1269c851e9724}{ICSelection}};\ \ }
\DoxyCodeLine{00154\ }
\DoxyCodeLine{00155\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___i_c___init_type_def_a452a4a459b6f7b7c478db032de9b0d72}{ICPrescaler}};\ \ }
\DoxyCodeLine{00157\ }
\DoxyCodeLine{00158\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___i_c___init_type_def_ae8432aa11b5495b252ac7ae299eabb32}{ICFilter}};\ \ \ \ \ }
\DoxyCodeLine{00160\ \}\ \mbox{\hyperlink{struct_t_i_m___i_c___init_type_def}{TIM\_IC\_InitTypeDef}};}
\DoxyCodeLine{00161\ }
\DoxyCodeLine{00165\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00166\ \{}
\DoxyCodeLine{00167\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_ab1e4b0752d88c04081e3ff2fea6aa52e}{EncoderMode}};\ \ \ }
\DoxyCodeLine{00169\ }
\DoxyCodeLine{00170\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_a3e27323d593e4f3b95ebaa3772e79618}{IC1Polarity}};\ \ \ }
\DoxyCodeLine{00172\ }
\DoxyCodeLine{00173\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_a85fbdebacff594ff1ad0d16eddfdc179}{IC1Selection}};\ \ }
\DoxyCodeLine{00175\ }
\DoxyCodeLine{00176\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_a56307eb4766e3f0e1cd1cd3c4fc2157e}{IC1Prescaler}};\ \ }
\DoxyCodeLine{00178\ }
\DoxyCodeLine{00179\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_a50f3051c1b568b9dcde146199f97f3fb}{IC1Filter}};\ \ \ \ \ }
\DoxyCodeLine{00181\ }
\DoxyCodeLine{00182\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_abb7968a8ba34e13da1fb8f5916a754ce}{IC2Polarity}};\ \ \ }
\DoxyCodeLine{00184\ }
\DoxyCodeLine{00185\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_a84a39a8667f296b4b3fbe1a0add58396}{IC2Selection}};\ \ }
\DoxyCodeLine{00187\ }
\DoxyCodeLine{00188\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_ac80972d0e157508ff075815da58070cb}{IC2Prescaler}};\ \ }
\DoxyCodeLine{00190\ }
\DoxyCodeLine{00191\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def_a30cdb580735007aa9735b2f5cc133049}{IC2Filter}};\ \ \ \ \ }
\DoxyCodeLine{00193\ \}\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def}{TIM\_Encoder\_InitTypeDef}};}
\DoxyCodeLine{00194\ }
\DoxyCodeLine{00198\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00199\ \{}
\DoxyCodeLine{00200\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clock_config_type_def_a54c329013b5f6f87d1c3d2495fca84d2}{ClockSource}};\ \ \ \ \ }
\DoxyCodeLine{00202\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clock_config_type_def_a66453fa8dc8a300267ff5aba08eff5c4}{ClockPolarity}};\ \ \ }
\DoxyCodeLine{00204\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clock_config_type_def_ae4c0cb6f58da0ec7b99f1c6411d2fee1}{ClockPrescaler}};\ \ }
\DoxyCodeLine{00206\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clock_config_type_def_adaf66568c766f75c4c661a872ca399e3}{ClockFilter}};\ \ \ \ \ }
\DoxyCodeLine{00208\ \}\ \mbox{\hyperlink{struct_t_i_m___clock_config_type_def}{TIM\_ClockConfigTypeDef}};}
\DoxyCodeLine{00209\ }
\DoxyCodeLine{00213\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00214\ \{}
\DoxyCodeLine{00215\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clear_input_config_type_def_a01d4b91dd297c4f0582a4d9179abf32f}{ClearInputState}};\ \ \ \ \ \ }
\DoxyCodeLine{00217\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clear_input_config_type_def_a776d2f14021a82e022468fd46594b8a0}{ClearInputSource}};\ \ \ \ \ }
\DoxyCodeLine{00219\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clear_input_config_type_def_a49dbc65edc5316822fcabd61cc8409de}{ClearInputPolarity}};\ \ \ }
\DoxyCodeLine{00221\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clear_input_config_type_def_a509cecb64fec71391ddc8b4703e09cfe}{ClearInputPrescaler}};\ \ }
\DoxyCodeLine{00224\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___clear_input_config_type_def_a6d2e06a970e30aaf4f8a6091e443eecf}{ClearInputFilter}};\ \ \ \ \ }
\DoxyCodeLine{00226\ \}\ \mbox{\hyperlink{struct_t_i_m___clear_input_config_type_def}{TIM\_ClearInputConfigTypeDef}};}
\DoxyCodeLine{00227\ }
\DoxyCodeLine{00233\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00234\ \{}
\DoxyCodeLine{00235\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___master_config_type_def_a908a6c1b46cb203c0b8b59b490e1114e}{MasterOutputTrigger}};\ \ \ }
\DoxyCodeLine{00237\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___master_config_type_def_a5c9db1837051b5b2927bc4d726e980fe}{MasterOutputTrigger2}};\ \ }
\DoxyCodeLine{00239\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___master_config_type_def_a45ddfca310a1180e19fc24b36f8e9585}{MasterSlaveMode}};\ \ \ \ \ \ \ }
\DoxyCodeLine{00246\ \}\ \mbox{\hyperlink{struct_t_i_m___master_config_type_def}{TIM\_MasterConfigTypeDef}};}
\DoxyCodeLine{00247\ }
\DoxyCodeLine{00251\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00252\ \{}
\DoxyCodeLine{00253\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def_a2792de155698128ade1e505618c1bc43}{SlaveMode}};\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00255\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def_a82efdad1e2ed9edbd4c895987ebfe0f7}{InputTrigger}};\ \ \ \ \ \ }
\DoxyCodeLine{00257\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def_afa8fa1801ef5e13115732a495ef11165}{TriggerPolarity}};\ \ \ }
\DoxyCodeLine{00259\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def_a57be6d41d77a968f1daeac7b65b1ab4c}{TriggerPrescaler}};\ \ }
\DoxyCodeLine{00261\ \ \ uint32\_t\ \ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def_a07d28f704576a41e37bbb7412e0fba60}{TriggerFilter}};\ \ \ \ \ }
\DoxyCodeLine{00263\ }
\DoxyCodeLine{00264\ \}\ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def}{TIM\_SlaveConfigTypeDef}};}
\DoxyCodeLine{00265\ }
\DoxyCodeLine{00271\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct}}
\DoxyCodeLine{00272\ \{}
\DoxyCodeLine{00273\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a5e97751b5e397414e2a5120eb5cef7c6}{OffStateRunMode}};\ \ \ \ \ \ }
\DoxyCodeLine{00274\ }
\DoxyCodeLine{00275\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a49f39e31ac019b9b7a20751bfd01c6c4}{OffStateIDLEMode}};\ \ \ \ \ }
\DoxyCodeLine{00276\ }
\DoxyCodeLine{00277\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ab00ae9fa5c6daa6319883863dee6e40a}{LockLevel}};\ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00278\ }
\DoxyCodeLine{00279\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a4bdc5aec84be4b728b55028491f261d4}{DeadTime}};\ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00280\ }
\DoxyCodeLine{00281\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a8962430194b43ac28a14c96dd9cc44e6}{BreakState}};\ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00282\ }
\DoxyCodeLine{00283\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ae15ddbf3087f9a2129a52a1317339ea7}{BreakPolarity}};\ \ \ \ \ \ \ \ }
\DoxyCodeLine{00284\ }
\DoxyCodeLine{00285\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_aad8158e694a62f6c071975ee4c2e5b6a}{BreakFilter}};\ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00286\ }
\DoxyCodeLine{00287\ \textcolor{preprocessor}{\#if\ defined(TIM\_BDTR\_BKBID)}}
\DoxyCodeLine{00288\ \ \ uint32\_t\ BreakAFMode;\ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00289\ }
\DoxyCodeLine{00290\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM\_BDTR\_BKBID\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00291\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ab9a983671c730c9b33852c9aa60846fb}{Break2State}};\ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00292\ }
\DoxyCodeLine{00293\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_af492d4b9f5e974abb51abe58d413cd17}{Break2Polarity}};\ \ \ \ \ \ \ }
\DoxyCodeLine{00294\ }
\DoxyCodeLine{00295\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a3c90aabc31a34864525dad4bd3547c86}{Break2Filter}};\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00296\ }
\DoxyCodeLine{00297\ \textcolor{preprocessor}{\#if\ defined(TIM\_BDTR\_BKBID)}}
\DoxyCodeLine{00298\ \ \ uint32\_t\ Break2AFMode;\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00299\ }
\DoxyCodeLine{00300\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM\_BDTR\_BKBID\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00301\ \ \ uint32\_t\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ae591f2368d0be5b77d8a746e73eabe71}{AutomaticOutput}};\ \ \ \ \ \ }
\DoxyCodeLine{00302\ }
\DoxyCodeLine{00303\ \}\ \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def}{TIM\_BreakDeadTimeConfigTypeDef}};}
\DoxyCodeLine{00304\ }
\DoxyCodeLine{00308\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{enum}}
\DoxyCodeLine{00309\ \{}
\DoxyCodeLine{00310\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggae0994cf5970e56ca4903e9151f40010ca28011b79e60b74a6c55947c505c51cbc}{HAL\_TIM\_STATE\_RESET}}\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x00U,\ \ \ \ }
\DoxyCodeLine{00311\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggae0994cf5970e56ca4903e9151f40010ca4545554d7fa04d17e78d69d17cb7e4b3}{HAL\_TIM\_STATE\_READY}}\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x01U,\ \ \ \ }
\DoxyCodeLine{00312\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggae0994cf5970e56ca4903e9151f40010ca1ddbfef19ad0562eb8143919b710cc12}{HAL\_TIM\_STATE\_BUSY}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x02U,\ \ \ \ }
\DoxyCodeLine{00313\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggae0994cf5970e56ca4903e9151f40010ca03e3339df71a74ac37820f72c2989371}{HAL\_TIM\_STATE\_TIMEOUT}}\ \ \ \ \ \ \ \ \ \ \ =\ 0x03U,\ \ \ \ }
\DoxyCodeLine{00314\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggae0994cf5970e56ca4903e9151f40010ca318cceb243cb9ca9e01833913e4f90ea}{HAL\_TIM\_STATE\_ERROR}}\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x04U\ \ \ \ \ }
\DoxyCodeLine{00315\ \}\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}};}
\DoxyCodeLine{00316\ }
\DoxyCodeLine{00320\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{enum}}
\DoxyCodeLine{00321\ \{}
\DoxyCodeLine{00322\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_gga1a70fcbe9952e18af5c890e216a15f34a430f7e41a278868bc1a7c5de6a08dc94}{HAL\_TIM\_CHANNEL\_STATE\_RESET}}\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x00U,\ \ \ \ }
\DoxyCodeLine{00323\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_gga1a70fcbe9952e18af5c890e216a15f34a38f4c5665247f7c997d0b200ed7ccc0e}{HAL\_TIM\_CHANNEL\_STATE\_READY}}\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x01U,\ \ \ \ }
\DoxyCodeLine{00324\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_gga1a70fcbe9952e18af5c890e216a15f34ad5dca7086716ee2cde9aaccaefd838ff}{HAL\_TIM\_CHANNEL\_STATE\_BUSY}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x02U,\ \ \ \ }
\DoxyCodeLine{00325\ \}\ \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\_TIM\_ChannelStateTypeDef}};}
\DoxyCodeLine{00326\ }
\DoxyCodeLine{00330\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{enum}}
\DoxyCodeLine{00331\ \{}
\DoxyCodeLine{00332\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_gga9b87df539778a60ea940a9d5ba793f7ca98c26cb59bb0c07b7f020d7ff8678bb8}{HAL\_DMA\_BURST\_STATE\_RESET}}\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x00U,\ \ \ \ }
\DoxyCodeLine{00333\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_gga9b87df539778a60ea940a9d5ba793f7ca44e8b59c22cd2b17d449b120e03e4952}{HAL\_DMA\_BURST\_STATE\_READY}}\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x01U,\ \ \ \ }
\DoxyCodeLine{00334\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_gga9b87df539778a60ea940a9d5ba793f7ca2de45462aabea1ed8b0d249441404e82}{HAL\_DMA\_BURST\_STATE\_BUSY}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x02U,\ \ \ \ }
\DoxyCodeLine{00335\ \}\ \mbox{\hyperlink{group___t_i_m___exported___types_ga9b87df539778a60ea940a9d5ba793f7c}{HAL\_TIM\_DMABurstStateTypeDef}};}
\DoxyCodeLine{00336\ }
\DoxyCodeLine{00340\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{enum}}
\DoxyCodeLine{00341\ \{}
\DoxyCodeLine{00342\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggaa3fa7bcbb4707f1151ccfc90a8cf9706a2024e95c48b58ec9b2115faa276e3fad}{HAL\_TIM\_ACTIVE\_CHANNEL\_1}}\ \ \ \ \ \ \ \ =\ 0x01U,\ \ \ \ }
\DoxyCodeLine{00343\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggaa3fa7bcbb4707f1151ccfc90a8cf9706ae80e6a1dd1c479f504219c0fec2f3322}{HAL\_TIM\_ACTIVE\_CHANNEL\_2}}\ \ \ \ \ \ \ \ =\ 0x02U,\ \ \ \ }
\DoxyCodeLine{00344\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggaa3fa7bcbb4707f1151ccfc90a8cf9706acc3fcf4ee6d91744c4bc6a5eccde2601}{HAL\_TIM\_ACTIVE\_CHANNEL\_3}}\ \ \ \ \ \ \ \ =\ 0x04U,\ \ \ \ }
\DoxyCodeLine{00345\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggaa3fa7bcbb4707f1151ccfc90a8cf9706a7d98ec7e385cacb3aaa6cec601fa6ab6}{HAL\_TIM\_ACTIVE\_CHANNEL\_4}}\ \ \ \ \ \ \ \ =\ 0x08U,\ \ \ \ }
\DoxyCodeLine{00346\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggaa3fa7bcbb4707f1151ccfc90a8cf9706a50b9b4be055407e9f566d8da0a7e07cc}{HAL\_TIM\_ACTIVE\_CHANNEL\_5}}\ \ \ \ \ \ \ \ =\ 0x10U,\ \ \ \ }
\DoxyCodeLine{00347\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggaa3fa7bcbb4707f1151ccfc90a8cf9706a368a574b486286c87f763957a0ef9d93}{HAL\_TIM\_ACTIVE\_CHANNEL\_6}}\ \ \ \ \ \ \ \ =\ 0x20U,\ \ \ \ }
\DoxyCodeLine{00348\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_ggaa3fa7bcbb4707f1151ccfc90a8cf9706a574f72ac3bb41fe660318aa42dfdc98d}{HAL\_TIM\_ACTIVE\_CHANNEL\_CLEARED}}\ \ =\ 0x00U\ \ \ \ \ }
\DoxyCodeLine{00349\ \}\ \mbox{\hyperlink{group___t_i_m___exported___types_gaa3fa7bcbb4707f1151ccfc90a8cf9706}{HAL\_TIM\_ActiveChannel}};}
\DoxyCodeLine{00350\ }
\DoxyCodeLine{00354\ \textcolor{preprocessor}{\#if\ (USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ ==\ 1)}}
\DoxyCodeLine{00355\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef}
\DoxyCodeLine{00356\ \#else}
\DoxyCodeLine{00357\ typedef\ struct}
\DoxyCodeLine{00358\ \#endif\ \textcolor{comment}{/*\ USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ */}}
\DoxyCodeLine{00359\ \{}
\DoxyCodeLine{00360\ \ \ \mbox{\hyperlink{struct_t_i_m___type_def}{TIM\_TypeDef}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ *\mbox{\hyperlink{struct_t_i_m___handle_type_def_ad0c5f736a15f6d8d14724854c8133bcc}{Instance}};\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00361\ \ \ \mbox{\hyperlink{struct_t_i_m___base___init_type_def}{TIM\_Base\_InitTypeDef}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \mbox{\hyperlink{struct_t_i_m___handle_type_def_a8b2e61c3c4128e62cb7be7d35048152e}{Init}};\ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00362\ \ \ \mbox{\hyperlink{group___t_i_m___exported___types_gaa3fa7bcbb4707f1151ccfc90a8cf9706}{HAL\_TIM\_ActiveChannel}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ \mbox{\hyperlink{struct_t_i_m___handle_type_def_ae9c5a11c1f5b27c808c0aca453e63870}{Channel}};\ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00363\ \ \ \mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\_HandleTypeDef}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ *\mbox{\hyperlink{struct_t_i_m___handle_type_def_a15338c71de82fa178c685be868e694bd}{hdma}}[7];\ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00365\ \ \ \mbox{\hyperlink{stm32h7xx__hal__def_8h_ab367482e943333a1299294eadaad284b}{HAL\_LockTypeDef}}\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \mbox{\hyperlink{struct_t_i_m___handle_type_def_a2a24b963b57150ed2fb0f051cd87b65a}{Lock}};\ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00366\ \ \ \mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\_\_IO}}\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}}\ \ \ \ \ \ \ \ \ \ \mbox{\hyperlink{struct_t_i_m___handle_type_def_a6b6eeaf94f2e6e3d0a5bdac44adf21d6}{State}};\ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00367\ \ \ \mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\_\_IO}}\ \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\_TIM\_ChannelStateTypeDef}}\ \ \ \mbox{\hyperlink{struct_t_i_m___handle_type_def_a97dfe939e85a354c2dd8c66bef48e5a2}{ChannelState}}[6];\ \ \ }
\DoxyCodeLine{00368\ \ \ \mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\_\_IO}}\ \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\_TIM\_ChannelStateTypeDef}}\ \ \ \mbox{\hyperlink{struct_t_i_m___handle_type_def_ac7648b2c1fd8d3fb38913fbad5379b11}{ChannelNState}}[4];\ \ }
\DoxyCodeLine{00369\ \ \ \mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\_\_IO}}\ \mbox{\hyperlink{group___t_i_m___exported___types_ga9b87df539778a60ea940a9d5ba793f7c}{HAL\_TIM\_DMABurstStateTypeDef}}\ \ \mbox{\hyperlink{struct_t_i_m___handle_type_def_a985e3a4b24617ab917ed20e089e4ce83}{DMABurstState}};\ \ \ \ \ }
\DoxyCodeLine{00370\ }
\DoxyCodeLine{00371\ \textcolor{preprocessor}{\#if\ (USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ ==\ 1)}}
\DoxyCodeLine{00372\ \ \ void\ (*\ Base\_MspInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00373\ \ \ void\ (*\ Base\_MspDeInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00374\ \ \ void\ (*\ IC\_MspInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00375\ \ \ void\ (*\ IC\_MspDeInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00376\ \ \ void\ (*\ OC\_MspInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00377\ \ \ void\ (*\ OC\_MspDeInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00378\ \ \ void\ (*\ PWM\_MspInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00379\ \ \ void\ (*\ PWM\_MspDeInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00380\ \ \ void\ (*\ OnePulse\_MspInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00381\ \ \ void\ (*\ OnePulse\_MspDeInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ }
\DoxyCodeLine{00382\ \ \ void\ (*\ Encoder\_MspInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00383\ \ \ void\ (*\ Encoder\_MspDeInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00384\ \ \ void\ (*\ HallSensor\_MspInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ }
\DoxyCodeLine{00385\ \ \ void\ (*\ HallSensor\_MspDeInitCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ }
\DoxyCodeLine{00386\ \ \ void\ (*\ PeriodElapsedCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00387\ \ \ void\ (*\ PeriodElapsedHalfCpltCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ }
\DoxyCodeLine{00388\ \ \ void\ (*\ TriggerCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00389\ \ \ void\ (*\ TriggerHalfCpltCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00390\ \ \ void\ (*\ IC\_CaptureCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00391\ \ \ void\ (*\ IC\_CaptureHalfCpltCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ }
\DoxyCodeLine{00392\ \ \ void\ (*\ OC\_DelayElapsedCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00393\ \ \ void\ (*\ PWM\_PulseFinishedCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00394\ \ \ void\ (*\ PWM\_PulseFinishedHalfCpltCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ }
\DoxyCodeLine{00395\ \ \ void\ (*\ ErrorCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00396\ \ \ void\ (*\ CommutationCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00397\ \ \ void\ (*\ CommutationHalfCpltCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ }
\DoxyCodeLine{00398\ \ \ void\ (*\ BreakCallback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00399\ \ \ void\ (*\ Break2Callback)(\textcolor{keyword}{struct\ }\_\_TIM\_HandleTypeDef\ *htim);\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }
\DoxyCodeLine{00400\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00401\ \}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}};}
\DoxyCodeLine{00402\ }
\DoxyCodeLine{00403\ \textcolor{preprocessor}{\#if\ (USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ ==\ 1)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00407\ \textcolor{keyword}{typedef}\ \textcolor{keyword}{enum}}
\DoxyCodeLine{00408\ \{}
\DoxyCodeLine{00409\ \ \ HAL\_TIM\_BASE\_MSPINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x00U\ \ \ }
\DoxyCodeLine{00410\ \ \ ,\ HAL\_TIM\_BASE\_MSPDEINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ =\ 0x01U\ \ \ }
\DoxyCodeLine{00411\ \ \ ,\ HAL\_TIM\_IC\_MSPINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x02U\ \ \ }
\DoxyCodeLine{00412\ \ \ ,\ HAL\_TIM\_IC\_MSPDEINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ =\ 0x03U\ \ \ }
\DoxyCodeLine{00413\ \ \ ,\ HAL\_TIM\_OC\_MSPINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x04U\ \ \ }
\DoxyCodeLine{00414\ \ \ ,\ HAL\_TIM\_OC\_MSPDEINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ =\ 0x05U\ \ \ }
\DoxyCodeLine{00415\ \ \ ,\ HAL\_TIM\_PWM\_MSPINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x06U\ \ \ }
\DoxyCodeLine{00416\ \ \ ,\ HAL\_TIM\_PWM\_MSPDEINIT\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ =\ 0x07U\ \ \ }
\DoxyCodeLine{00417\ \ \ ,\ HAL\_TIM\_ONE\_PULSE\_MSPINIT\_CB\_ID\ \ \ \ \ \ \ =\ 0x08U\ \ \ }
\DoxyCodeLine{00418\ \ \ ,\ HAL\_TIM\_ONE\_PULSE\_MSPDEINIT\_CB\_ID\ \ \ \ \ =\ 0x09U\ \ \ }
\DoxyCodeLine{00419\ \ \ ,\ HAL\_TIM\_ENCODER\_MSPINIT\_CB\_ID\ \ \ \ \ \ \ \ \ =\ 0x0AU\ \ \ }
\DoxyCodeLine{00420\ \ \ ,\ HAL\_TIM\_ENCODER\_MSPDEINIT\_CB\_ID\ \ \ \ \ \ \ =\ 0x0BU\ \ \ }
\DoxyCodeLine{00421\ \ \ ,\ HAL\_TIM\_HALL\_SENSOR\_MSPINIT\_CB\_ID\ \ \ \ \ =\ 0x0CU\ \ \ }
\DoxyCodeLine{00422\ \ \ ,\ HAL\_TIM\_HALL\_SENSOR\_MSPDEINIT\_CB\_ID\ \ \ =\ 0x0DU\ \ \ }
\DoxyCodeLine{00423\ \ \ ,\ HAL\_TIM\_PERIOD\_ELAPSED\_CB\_ID\ \ \ \ \ \ \ \ \ \ =\ 0x0EU\ \ \ }
\DoxyCodeLine{00424\ \ \ ,\ HAL\_TIM\_PERIOD\_ELAPSED\_HALF\_CB\_ID\ \ \ \ \ =\ 0x0FU\ \ \ }
\DoxyCodeLine{00425\ \ \ ,\ HAL\_TIM\_TRIGGER\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x10U\ \ \ }
\DoxyCodeLine{00426\ \ \ ,\ HAL\_TIM\_TRIGGER\_HALF\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ =\ 0x11U\ \ \ }
\DoxyCodeLine{00427\ \ \ ,\ HAL\_TIM\_IC\_CAPTURE\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x12U\ \ \ }
\DoxyCodeLine{00428\ \ \ ,\ HAL\_TIM\_IC\_CAPTURE\_HALF\_CB\_ID\ \ \ \ \ \ \ \ \ =\ 0x13U\ \ \ }
\DoxyCodeLine{00429\ \ \ ,\ HAL\_TIM\_OC\_DELAY\_ELAPSED\_CB\_ID\ \ \ \ \ \ \ \ =\ 0x14U\ \ \ }
\DoxyCodeLine{00430\ \ \ ,\ HAL\_TIM\_PWM\_PULSE\_FINISHED\_CB\_ID\ \ \ \ \ \ =\ 0x15U\ \ \ }
\DoxyCodeLine{00431\ \ \ ,\ HAL\_TIM\_PWM\_PULSE\_FINISHED\_HALF\_CB\_ID\ =\ 0x16U\ \ \ }
\DoxyCodeLine{00432\ \ \ ,\ HAL\_TIM\_ERROR\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x17U\ \ \ }
\DoxyCodeLine{00433\ \ \ ,\ HAL\_TIM\_COMMUTATION\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x18U\ \ \ }
\DoxyCodeLine{00434\ \ \ ,\ HAL\_TIM\_COMMUTATION\_HALF\_CB\_ID\ \ \ \ \ \ \ \ =\ 0x19U\ \ \ }
\DoxyCodeLine{00435\ \ \ ,\ HAL\_TIM\_BREAK\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x1AU\ \ \ }
\DoxyCodeLine{00436\ \ \ ,\ HAL\_TIM\_BREAK2\_CB\_ID\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ =\ 0x1BU\ \ \ }
\DoxyCodeLine{00437\ \}\ HAL\_TIM\_CallbackIDTypeDef;}
\DoxyCodeLine{00438\ }
\DoxyCodeLine{00442\ \textcolor{keyword}{typedef}\ \ void\ (*pTIM\_CallbackTypeDef)(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);\ \ }
\DoxyCodeLine{00443\ }
\DoxyCodeLine{00444\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00445\ }
\DoxyCodeLine{00449\ \textcolor{comment}{/*\ End\ of\ exported\ types\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00450\ }
\DoxyCodeLine{00451\ \textcolor{comment}{/*\ Exported\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00455\ }
\DoxyCodeLine{00459\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTSOURCE\_NONE\ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00460\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTSOURCE\_ETR\ \ \ \ \ \ \ \ \ \ \ \ 0x00000001U\ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00464\ }
\DoxyCodeLine{00468\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CR1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U}}
\DoxyCodeLine{00469\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CR2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000001U}}
\DoxyCodeLine{00470\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_SMCR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000002U}}
\DoxyCodeLine{00471\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_DIER\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000003U}}
\DoxyCodeLine{00472\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_SR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000004U}}
\DoxyCodeLine{00473\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_EGR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000005U}}
\DoxyCodeLine{00474\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCMR1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000006U}}
\DoxyCodeLine{00475\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCMR2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000007U}}
\DoxyCodeLine{00476\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCER\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000008U}}
\DoxyCodeLine{00477\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CNT\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000009U}}
\DoxyCodeLine{00478\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_PSC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000AU}}
\DoxyCodeLine{00479\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_ARR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000BU}}
\DoxyCodeLine{00480\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_RCR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000CU}}
\DoxyCodeLine{00481\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCR1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000DU}}
\DoxyCodeLine{00482\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCR2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000EU}}
\DoxyCodeLine{00483\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCR3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000FU}}
\DoxyCodeLine{00484\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCR4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000010U}}
\DoxyCodeLine{00485\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_BDTR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000011U}}
\DoxyCodeLine{00486\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_DCR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000012U}}
\DoxyCodeLine{00487\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_DMAR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000013U}}
\DoxyCodeLine{00488\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCMR3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000015U}}
\DoxyCodeLine{00489\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCR5\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000016U}}
\DoxyCodeLine{00490\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_CCR6\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000017U}}
\DoxyCodeLine{00491\ \textcolor{preprocessor}{\#if\ \ \ defined(TIM\_BREAK\_INPUT\_SUPPORT)}}
\DoxyCodeLine{00492\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_AF1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000018U}}
\DoxyCodeLine{00493\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_AF2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000019U}}
\DoxyCodeLine{00494\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM\_BREAK\_INPUT\_SUPPORT\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00495\ \textcolor{preprocessor}{\#define\ TIM\_DMABASE\_TISEL\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000001AU}\textcolor{preprocessor}{}}
\DoxyCodeLine{00499\ }
\DoxyCodeLine{00503\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_UPDATE\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_UG\ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00504\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_CC1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_CC1G\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00505\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_CC2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_CC2G\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00506\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_CC3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_CC3G\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00507\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_CC4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_CC4G\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00508\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_COM\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_COMG\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00509\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_TRIGGER\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_TG\ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00510\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_BREAK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_BG\ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00511\ \textcolor{preprocessor}{\#define\ TIM\_EVENTSOURCE\_BREAK2\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_EGR\_B2G\ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00515\ }
\DoxyCodeLine{00519\ \textcolor{preprocessor}{\#define\ \ TIM\_INPUTCHANNELPOLARITY\_RISING\ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00520\ \textcolor{preprocessor}{\#define\ \ TIM\_INPUTCHANNELPOLARITY\_FALLING\ \ \ \ \ TIM\_CCER\_CC1P\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00521\ \textcolor{preprocessor}{\#define\ \ TIM\_INPUTCHANNELPOLARITY\_BOTHEDGE\ \ \ \ (TIM\_CCER\_CC1P\ |\ TIM\_CCER\_CC1NP)\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00525\ }
\DoxyCodeLine{00529\ \textcolor{preprocessor}{\#define\ TIM\_ETRPOLARITY\_INVERTED\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_ETP\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00530\ \textcolor{preprocessor}{\#define\ TIM\_ETRPOLARITY\_NONINVERTED\ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00534\ }
\DoxyCodeLine{00538\ \textcolor{preprocessor}{\#define\ TIM\_ETRPRESCALER\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00539\ \textcolor{preprocessor}{\#define\ TIM\_ETRPRESCALER\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_ETPS\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00540\ \textcolor{preprocessor}{\#define\ TIM\_ETRPRESCALER\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_ETPS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00541\ \textcolor{preprocessor}{\#define\ TIM\_ETRPRESCALER\_DIV8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_ETPS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00545\ }
\DoxyCodeLine{00549\ \textcolor{preprocessor}{\#define\ TIM\_COUNTERMODE\_UP\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00550\ \textcolor{preprocessor}{\#define\ TIM\_COUNTERMODE\_DOWN\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR1\_DIR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00551\ \textcolor{preprocessor}{\#define\ TIM\_COUNTERMODE\_CENTERALIGNED1\ \ \ \ \ TIM\_CR1\_CMS\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00552\ \textcolor{preprocessor}{\#define\ TIM\_COUNTERMODE\_CENTERALIGNED2\ \ \ \ \ TIM\_CR1\_CMS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00553\ \textcolor{preprocessor}{\#define\ TIM\_COUNTERMODE\_CENTERALIGNED3\ \ \ \ \ TIM\_CR1\_CMS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00557\ }
\DoxyCodeLine{00561\ \textcolor{preprocessor}{\#define\ TIM\_UIFREMAP\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00562\ \textcolor{preprocessor}{\#define\ TIM\_UIFREMAP\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR1\_UIFREMAP\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00566\ }
\DoxyCodeLine{00570\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKDIVISION\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00571\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKDIVISION\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR1\_CKD\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00572\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKDIVISION\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR1\_CKD\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00576\ }
\DoxyCodeLine{00580\ \textcolor{preprocessor}{\#define\ TIM\_OUTPUTSTATE\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00581\ \textcolor{preprocessor}{\#define\ TIM\_OUTPUTSTATE\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCER\_CC1E\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00585\ }
\DoxyCodeLine{00589\ \textcolor{preprocessor}{\#define\ TIM\_AUTORELOAD\_PRELOAD\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00590\ \textcolor{preprocessor}{\#define\ TIM\_AUTORELOAD\_PRELOAD\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR1\_ARPE\ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00591\ }
\DoxyCodeLine{00595\ }
\DoxyCodeLine{00599\ \textcolor{preprocessor}{\#define\ TIM\_OCFAST\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00600\ \textcolor{preprocessor}{\#define\ TIM\_OCFAST\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_OC1FE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00604\ }
\DoxyCodeLine{00608\ \textcolor{preprocessor}{\#define\ TIM\_OUTPUTNSTATE\_DISABLE\ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00609\ \textcolor{preprocessor}{\#define\ TIM\_OUTPUTNSTATE\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCER\_CC1NE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00613\ }
\DoxyCodeLine{00617\ \textcolor{preprocessor}{\#define\ TIM\_OCPOLARITY\_HIGH\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00618\ \textcolor{preprocessor}{\#define\ TIM\_OCPOLARITY\_LOW\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCER\_CC1P\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00622\ }
\DoxyCodeLine{00626\ \textcolor{preprocessor}{\#define\ TIM\_OCNPOLARITY\_HIGH\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00627\ \textcolor{preprocessor}{\#define\ TIM\_OCNPOLARITY\_LOW\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCER\_CC1NP\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00631\ }
\DoxyCodeLine{00635\ \textcolor{preprocessor}{\#define\ TIM\_OCIDLESTATE\_SET\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_OIS1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00636\ \textcolor{preprocessor}{\#define\ TIM\_OCIDLESTATE\_RESET\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00640\ }
\DoxyCodeLine{00644\ \textcolor{preprocessor}{\#define\ TIM\_OCNIDLESTATE\_SET\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_OIS1N\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00645\ \textcolor{preprocessor}{\#define\ TIM\_OCNIDLESTATE\_RESET\ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00649\ }
\DoxyCodeLine{00653\ \textcolor{preprocessor}{\#define\ \ TIM\_ICPOLARITY\_RISING\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_RISING\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00654\ \textcolor{preprocessor}{\#define\ \ TIM\_ICPOLARITY\_FALLING\ \ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_FALLING\ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00655\ \textcolor{preprocessor}{\#define\ \ TIM\_ICPOLARITY\_BOTHEDGE\ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_BOTHEDGE\ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00659\ }
\DoxyCodeLine{00663\ \textcolor{preprocessor}{\#define\ \ TIM\_ENCODERINPUTPOLARITY\_RISING\ \ \ TIM\_INPUTCHANNELPOLARITY\_RISING\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00664\ \textcolor{preprocessor}{\#define\ \ TIM\_ENCODERINPUTPOLARITY\_FALLING\ \ TIM\_INPUTCHANNELPOLARITY\_FALLING\ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00668\ }
\DoxyCodeLine{00672\ \textcolor{preprocessor}{\#define\ TIM\_ICSELECTION\_DIRECTTI\ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_CC1S\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00673\ \textcolor{preprocessor}{\#define\ TIM\_ICSELECTION\_INDIRECTTI\ \ \ \ \ \ \ \ \ TIM\_CCMR1\_CC1S\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00674\ \textcolor{preprocessor}{\#define\ TIM\_ICSELECTION\_TRC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_CC1S\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00678\ }
\DoxyCodeLine{00682\ \textcolor{preprocessor}{\#define\ TIM\_ICPSC\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00683\ \textcolor{preprocessor}{\#define\ TIM\_ICPSC\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_IC1PSC\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00684\ \textcolor{preprocessor}{\#define\ TIM\_ICPSC\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_IC1PSC\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00685\ \textcolor{preprocessor}{\#define\ TIM\_ICPSC\_DIV8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_IC1PSC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00689\ }
\DoxyCodeLine{00693\ \textcolor{preprocessor}{\#define\ TIM\_OPMODE\_SINGLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR1\_OPM\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00694\ \textcolor{preprocessor}{\#define\ TIM\_OPMODE\_REPETITIVE\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00698\ }
\DoxyCodeLine{00702\ \textcolor{preprocessor}{\#define\ TIM\_ENCODERMODE\_TI1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_SMS\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00703\ \textcolor{preprocessor}{\#define\ TIM\_ENCODERMODE\_TI2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_SMS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00704\ \textcolor{preprocessor}{\#define\ TIM\_ENCODERMODE\_TI12\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_SMS\_1\ |\ TIM\_SMCR\_SMS\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00708\ }
\DoxyCodeLine{00712\ \textcolor{preprocessor}{\#define\ TIM\_IT\_UPDATE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_UIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00713\ \textcolor{preprocessor}{\#define\ TIM\_IT\_CC1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC1IE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00714\ \textcolor{preprocessor}{\#define\ TIM\_IT\_CC2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC2IE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00715\ \textcolor{preprocessor}{\#define\ TIM\_IT\_CC3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC3IE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00716\ \textcolor{preprocessor}{\#define\ TIM\_IT\_CC4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC4IE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00717\ \textcolor{preprocessor}{\#define\ TIM\_IT\_COM\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_COMIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00718\ \textcolor{preprocessor}{\#define\ TIM\_IT\_TRIGGER\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_TIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00719\ \textcolor{preprocessor}{\#define\ TIM\_IT\_BREAK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_BIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00723\ }
\DoxyCodeLine{00727\ \textcolor{preprocessor}{\#define\ TIM\_COMMUTATION\_TRGI\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_CCUS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00728\ \textcolor{preprocessor}{\#define\ TIM\_COMMUTATION\_SOFTWARE\ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00732\ }
\DoxyCodeLine{00736\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_UPDATE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_UDE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00737\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_CC1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC1DE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00738\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_CC2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC2DE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00739\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_CC3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC3DE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00740\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_CC4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_CC4DE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00741\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_COM\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_COMDE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00742\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_TRIGGER\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_DIER\_TDE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00746\ }
\DoxyCodeLine{00750\ \textcolor{preprocessor}{\#define\ TIM\_CCDMAREQUEST\_CC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00751\ \textcolor{preprocessor}{\#define\ TIM\_CCDMAREQUEST\_UPDATE\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_CCDS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00755\ }
\DoxyCodeLine{00759\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_UPDATE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_UIF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00760\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC1IF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00761\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC2IF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00762\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC3IF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00763\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC4IF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00764\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC5\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC5IF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00765\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC6\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC6IF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00766\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_COM\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_COMIF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00767\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_TRIGGER\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_TIF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00768\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_BREAK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_BIF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00769\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_BREAK2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_B2IF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00770\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_SYSTEM\_BREAK\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_SBIF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00771\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC1OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC1OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00772\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC2OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC2OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00773\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC3OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC3OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00774\ \textcolor{preprocessor}{\#define\ TIM\_FLAG\_CC4OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SR\_CC4OF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00778\ }
\DoxyCodeLine{00782\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00783\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000004U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00784\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000008U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00785\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000000CU\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00786\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_5\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000010U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00787\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_6\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000014U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00788\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_ALL\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x0000003CU\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00792\ }
\DoxyCodeLine{00796\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_INTERNAL\ \ \ \ TIM\_SMCR\_ETPS\_0\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00797\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ETRMODE1\ \ \ \ TIM\_TS\_ETRF\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00798\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ETRMODE2\ \ \ \ TIM\_SMCR\_ETPS\_1\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00799\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_TI1ED\ \ \ \ \ \ \ TIM\_TS\_TI1F\_ED\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00800\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_TI1\ \ \ \ \ \ \ \ \ TIM\_TS\_TI1FP1\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00801\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_TI2\ \ \ \ \ \ \ \ \ TIM\_TS\_TI2FP2\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00802\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR0\ \ \ \ \ \ \ \ TIM\_TS\_ITR0\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00803\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR1\ \ \ \ \ \ \ \ TIM\_TS\_ITR1\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00804\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR2\ \ \ \ \ \ \ \ TIM\_TS\_ITR2\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00805\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR3\ \ \ \ \ \ \ \ TIM\_TS\_ITR3\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00806\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR4\ \ \ \ \ \ \ \ TIM\_TS\_ITR4\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00807\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR5\ \ \ \ \ \ \ \ TIM\_TS\_ITR5\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00808\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR6\ \ \ \ \ \ \ \ TIM\_TS\_ITR6\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00809\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR7\ \ \ \ \ \ \ \ TIM\_TS\_ITR7\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00810\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKSOURCE\_ITR8\ \ \ \ \ \ \ \ TIM\_TS\_ITR8\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00814\ }
\DoxyCodeLine{00818\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPOLARITY\_INVERTED\ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPOLARITY\_INVERTED\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00819\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPOLARITY\_NONINVERTED\ \ \ \ \ \ \ \ TIM\_ETRPOLARITY\_NONINVERTED\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00820\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPOLARITY\_RISING\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_RISING\ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00821\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPOLARITY\_FALLING\ \ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_FALLING\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00822\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPOLARITY\_BOTHEDGE\ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_BOTHEDGE\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00826\ }
\DoxyCodeLine{00830\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPRESCALER\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV1\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00831\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPRESCALER\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV2\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00832\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPRESCALER\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV4\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00833\ \textcolor{preprocessor}{\#define\ TIM\_CLOCKPRESCALER\_DIV8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV8\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00837\ }
\DoxyCodeLine{00841\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTPOLARITY\_INVERTED\ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPOLARITY\_INVERTED\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00842\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTPOLARITY\_NONINVERTED\ \ \ \ \ \ \ \ TIM\_ETRPOLARITY\_NONINVERTED\ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00846\ }
\DoxyCodeLine{00850\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTPRESCALER\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV1\ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00851\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTPRESCALER\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV2\ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00852\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTPRESCALER\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV4\ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00853\ \textcolor{preprocessor}{\#define\ TIM\_CLEARINPUTPRESCALER\_DIV8\ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV8\ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00857\ }
\DoxyCodeLine{00861\ \textcolor{preprocessor}{\#define\ TIM\_OSSR\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_OSSR\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00862\ \textcolor{preprocessor}{\#define\ TIM\_OSSR\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00866\ }
\DoxyCodeLine{00870\ \textcolor{preprocessor}{\#define\ TIM\_OSSI\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_OSSI\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00871\ \textcolor{preprocessor}{\#define\ TIM\_OSSI\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00878\ \textcolor{preprocessor}{\#define\ TIM\_LOCKLEVEL\_OFF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00879\ \textcolor{preprocessor}{\#define\ TIM\_LOCKLEVEL\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_LOCK\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00880\ \textcolor{preprocessor}{\#define\ TIM\_LOCKLEVEL\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_LOCK\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00881\ \textcolor{preprocessor}{\#define\ TIM\_LOCKLEVEL\_3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_LOCK\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00885\ }
\DoxyCodeLine{00889\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_BKE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00890\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00894\ }
\DoxyCodeLine{00898\ \textcolor{preprocessor}{\#define\ TIM\_BREAKPOLARITY\_LOW\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00899\ \textcolor{preprocessor}{\#define\ TIM\_BREAKPOLARITY\_HIGH\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_BKP\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00903\ \textcolor{preprocessor}{\#if\ \ defined(TIM\_BDTR\_BKBID)}}
\DoxyCodeLine{00904\ }
\DoxyCodeLine{00908\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_AFMODE\_INPUT\ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00909\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_AFMODE\_BIDIRECTIONAL\ \ \ \ \ TIM\_BDTR\_BKBID\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00913\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*TIM\_BDTR\_BKBID\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00914\ }
\DoxyCodeLine{00918\ \textcolor{preprocessor}{\#define\ TIM\_BREAK2\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00919\ \textcolor{preprocessor}{\#define\ TIM\_BREAK2\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_BK2E\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00923\ }
\DoxyCodeLine{00927\ \textcolor{preprocessor}{\#define\ TIM\_BREAK2POLARITY\_LOW\ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00928\ \textcolor{preprocessor}{\#define\ TIM\_BREAK2POLARITY\_HIGH\ \ \ \ \ \ \ \ \ \ \ \ TIM\_BDTR\_BK2P\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00932\ \textcolor{preprocessor}{\#if\ defined(TIM\_BDTR\_BKBID)}}
\DoxyCodeLine{00933\ }
\DoxyCodeLine{00937\ \textcolor{preprocessor}{\#define\ TIM\_BREAK2\_AFMODE\_INPUT\ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00938\ \textcolor{preprocessor}{\#define\ TIM\_BREAK2\_AFMODE\_BIDIRECTIONAL\ \ \ \ TIM\_BDTR\_BK2BID\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00942\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM\_BDTR\_BKBID\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00943\ }
\DoxyCodeLine{00947\ \textcolor{preprocessor}{\#define\ TIM\_AUTOMATICOUTPUT\_DISABLE\ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00948\ \textcolor{preprocessor}{\#define\ TIM\_AUTOMATICOUTPUT\_ENABLE\ \ \ \ \ \ \ \ \ TIM\_BDTR\_AOE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00952\ }
\DoxyCodeLine{00956\ \textcolor{preprocessor}{\#define\ TIM\_GROUPCH5\_NONE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00957\ \textcolor{preprocessor}{\#define\ TIM\_GROUPCH5\_OC1REFC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCR5\_GC5C1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00958\ \textcolor{preprocessor}{\#define\ TIM\_GROUPCH5\_OC2REFC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCR5\_GC5C2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00959\ \textcolor{preprocessor}{\#define\ TIM\_GROUPCH5\_OC3REFC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCR5\_GC5C3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00963\ }
\DoxyCodeLine{00967\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_RESET\ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00968\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_ENABLE\ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_MMS\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00969\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_UPDATE\ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_MMS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00970\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_OC1\ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS\_1\ |\ TIM\_CR2\_MMS\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00971\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_OC1REF\ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_MMS\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00972\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_OC2REF\ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS\_2\ |\ TIM\_CR2\_MMS\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00973\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_OC3REF\ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS\_2\ |\ TIM\_CR2\_MMS\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00974\ \textcolor{preprocessor}{\#define\ TIM\_TRGO\_OC4REF\ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS\_2\ |\ TIM\_CR2\_MMS\_1\ |\ TIM\_CR2\_MMS\_0)\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00978\ }
\DoxyCodeLine{00982\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_RESET\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00983\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_MMS2\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00984\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_UPDATE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_MMS2\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00985\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS2\_1\ |\ TIM\_CR2\_MMS2\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00986\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC1REF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_MMS2\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00987\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC2REF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS2\_2\ |\ TIM\_CR2\_MMS2\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00988\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC3REF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS2\_2\ |\ TIM\_CR2\_MMS2\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00989\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC4REF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS2\_2\ |\ TIM\_CR2\_MMS2\_1\ |\ TIM\_CR2\_MMS2\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00990\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC5REF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CR2\_MMS2\_3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00991\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC6REF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS2\_3\ |\ TIM\_CR2\_MMS2\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00992\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC4REF\_RISINGFALLING\ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS2\_3\ |\ TIM\_CR2\_MMS2\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00993\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC6REF\_RISINGFALLING\ \ \ \ \ \ \ \ \ \ \ (TIM\_CR2\_MMS2\_3\ |\ TIM\_CR2\_MMS2\_1\ |\ TIM\_CR2\_MMS2\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00994\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC4REF\_RISING\_OC6REF\_RISING\ \ \ \ (TIM\_CR2\_MMS2\_3\ |\ TIM\_CR2\_MMS2\_2)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00995\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC4REF\_RISING\_OC6REF\_FALLING\ \ \ (TIM\_CR2\_MMS2\_3\ |\ TIM\_CR2\_MMS2\_2\ |\ TIM\_CR2\_MMS2\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00996\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC5REF\_RISING\_OC6REF\_RISING\ \ \ \ (TIM\_CR2\_MMS2\_3\ |\ TIM\_CR2\_MMS2\_2\ |TIM\_CR2\_MMS2\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00997\ \textcolor{preprocessor}{\#define\ TIM\_TRGO2\_OC5REF\_RISING\_OC6REF\_FALLING\ \ \ (TIM\_CR2\_MMS2\_3\ |\ TIM\_CR2\_MMS2\_2\ |\ TIM\_CR2\_MMS2\_1\ |\ TIM\_CR2\_MMS2\_0)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01001\ }
\DoxyCodeLine{01005\ \textcolor{preprocessor}{\#define\ TIM\_MASTERSLAVEMODE\_ENABLE\ \ \ \ \ \ \ \ \ TIM\_SMCR\_MSM\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01006\ \textcolor{preprocessor}{\#define\ TIM\_MASTERSLAVEMODE\_DISABLE\ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01010\ }
\DoxyCodeLine{01014\ \textcolor{preprocessor}{\#define\ TIM\_SLAVEMODE\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01015\ \textcolor{preprocessor}{\#define\ TIM\_SLAVEMODE\_RESET\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_SMS\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01016\ \textcolor{preprocessor}{\#define\ TIM\_SLAVEMODE\_GATED\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_SMS\_2\ |\ TIM\_SMCR\_SMS\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01017\ \textcolor{preprocessor}{\#define\ TIM\_SLAVEMODE\_TRIGGER\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_SMS\_2\ |\ TIM\_SMCR\_SMS\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01018\ \textcolor{preprocessor}{\#define\ TIM\_SLAVEMODE\_EXTERNAL1\ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_SMS\_2\ |\ TIM\_SMCR\_SMS\_1\ |\ TIM\_SMCR\_SMS\_0)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01019\ \textcolor{preprocessor}{\#define\ TIM\_SLAVEMODE\_COMBINED\_RESETTRIGGER\ \ TIM\_SMCR\_SMS\_3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01023\ }
\DoxyCodeLine{01027\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_TIMING\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01028\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_ACTIVE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_OC1M\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01029\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_INACTIVE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_OC1M\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01030\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_TOGGLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_1\ |\ TIM\_CCMR1\_OC1M\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01031\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_PWM1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_2\ |\ TIM\_CCMR1\_OC1M\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01032\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_PWM2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_2\ |\ TIM\_CCMR1\_OC1M\_1\ |\ TIM\_CCMR1\_OC1M\_0)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01033\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_FORCED\_ACTIVE\ \ \ \ \ \ \ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_2\ |\ TIM\_CCMR1\_OC1M\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01034\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_FORCED\_INACTIVE\ \ \ \ \ \ \ \ \ \ TIM\_CCMR1\_OC1M\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01035\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_RETRIGERRABLE\_OPM1\ \ \ \ \ \ TIM\_CCMR1\_OC1M\_3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01036\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_RETRIGERRABLE\_OPM2\ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_3\ |\ TIM\_CCMR1\_OC1M\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01037\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_COMBINED\_PWM1\ \ \ \ \ \ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_3\ |\ TIM\_CCMR1\_OC1M\_2)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01038\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_COMBINED\_PWM2\ \ \ \ \ \ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_3\ |\ TIM\_CCMR1\_OC1M\_0\ |\ TIM\_CCMR1\_OC1M\_2)\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01039\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_ASYMMETRIC\_PWM1\ \ \ \ \ \ \ \ \ (TIM\_CCMR1\_OC1M\_3\ |\ TIM\_CCMR1\_OC1M\_1\ |\ TIM\_CCMR1\_OC1M\_2)\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01040\ \textcolor{preprocessor}{\#define\ TIM\_OCMODE\_ASYMMETRIC\_PWM2\ \ \ \ \ \ \ \ \ TIM\_CCMR1\_OC1M\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01044\ }
\DoxyCodeLine{01048\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR0\ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01049\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR1\ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_TS\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01050\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR2\ \ \ \ \ \ \ \ \ \ TIM\_SMCR\_TS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01051\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR3\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01052\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR4\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01053\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR5\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01054\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR6\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_1\ |\ TIM\_SMCR\_TS\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01055\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR7\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_1\ |\ TIM\_SMCR\_TS\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01056\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR8\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_2\ |\ TIM\_SMCR\_TS\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01057\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR9\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_2\ |\ TIM\_SMCR\_TS\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01058\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR10\ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_1\ |\ TIM\_SMCR\_TS\_2\ |\ TIM\_SMCR\_TS\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01059\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR11\ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_1\ |\ TIM\_SMCR\_TS\_2\ |\ TIM\_SMCR\_TS\_3)\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01060\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR12\ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_4)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01061\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ITR13\ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_4)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01062\ \textcolor{preprocessor}{\#define\ TIM\_TS\_TI1F\_ED\ \ \ \ \ \ \ TIM\_SMCR\_TS\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01063\ \textcolor{preprocessor}{\#define\ TIM\_TS\_TI1FP1\ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_2)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01064\ \textcolor{preprocessor}{\#define\ TIM\_TS\_TI2FP2\ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_1\ |\ TIM\_SMCR\_TS\_2)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01065\ \textcolor{preprocessor}{\#define\ TIM\_TS\_ETRF\ \ \ \ \ \ \ \ \ \ (TIM\_SMCR\_TS\_0\ |\ TIM\_SMCR\_TS\_1\ |\ TIM\_SMCR\_TS\_2)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01066\ \textcolor{preprocessor}{\#define\ TIM\_TS\_NONE\ \ \ \ \ \ \ \ \ \ 0x0000FFFFU\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01070\ }
\DoxyCodeLine{01074\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPOLARITY\_INVERTED\ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPOLARITY\_INVERTED\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01075\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPOLARITY\_NONINVERTED\ \ \ \ \ \ \ \ TIM\_ETRPOLARITY\_NONINVERTED\ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01076\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPOLARITY\_RISING\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_RISING\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01077\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPOLARITY\_FALLING\ \ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_FALLING\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01078\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPOLARITY\_BOTHEDGE\ \ \ \ \ \ \ \ \ \ \ TIM\_INPUTCHANNELPOLARITY\_BOTHEDGE\ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01082\ }
\DoxyCodeLine{01086\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPRESCALER\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01087\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPRESCALER\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01088\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPRESCALER\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01089\ \textcolor{preprocessor}{\#define\ TIM\_TRIGGERPRESCALER\_DIV8\ \ \ \ \ \ \ \ \ \ \ \ \ TIM\_ETRPRESCALER\_DIV8\ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01093\ }
\DoxyCodeLine{01097\ \textcolor{preprocessor}{\#define\ TIM\_TI1SELECTION\_CH1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01098\ \textcolor{preprocessor}{\#define\ TIM\_TI1SELECTION\_XORCOMBINATION\ \ \ \ TIM\_CR2\_TI1S\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01102\ }
\DoxyCodeLine{01106\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_1TRANSFER\ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01107\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_2TRANSFERS\ \ \ \ \ \ 0x00000100U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01108\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_3TRANSFERS\ \ \ \ \ \ 0x00000200U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01109\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_4TRANSFERS\ \ \ \ \ \ 0x00000300U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01110\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_5TRANSFERS\ \ \ \ \ \ 0x00000400U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01111\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_6TRANSFERS\ \ \ \ \ \ 0x00000500U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01112\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_7TRANSFERS\ \ \ \ \ \ 0x00000600U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01113\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_8TRANSFERS\ \ \ \ \ \ 0x00000700U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01114\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_9TRANSFERS\ \ \ \ \ \ 0x00000800U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01115\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_10TRANSFERS\ \ \ \ \ 0x00000900U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01116\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_11TRANSFERS\ \ \ \ \ 0x00000A00U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01117\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_12TRANSFERS\ \ \ \ \ 0x00000B00U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01118\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_13TRANSFERS\ \ \ \ \ 0x00000C00U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01119\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_14TRANSFERS\ \ \ \ \ 0x00000D00U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01120\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_15TRANSFERS\ \ \ \ \ 0x00000E00U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01121\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_16TRANSFERS\ \ \ \ \ 0x00000F00U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01122\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_17TRANSFERS\ \ \ \ \ 0x00001000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01123\ \textcolor{preprocessor}{\#define\ TIM\_DMABURSTLENGTH\_18TRANSFERS\ \ \ \ \ 0x00001100U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01127\ }
\DoxyCodeLine{01131\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_ID\_UPDATE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((uint16\_t)\ 0x0000)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01132\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_ID\_CC1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((uint16\_t)\ 0x0001)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01133\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_ID\_CC2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((uint16\_t)\ 0x0002)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01134\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_ID\_CC3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((uint16\_t)\ 0x0003)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01135\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_ID\_CC4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((uint16\_t)\ 0x0004)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01136\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_ID\_COMMUTATION\ \ \ \ \ \ \ \ \ \ \ ((uint16\_t)\ 0x0005)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01137\ \textcolor{preprocessor}{\#define\ TIM\_DMA\_ID\_TRIGGER\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((uint16\_t)\ 0x0006)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01141\ }
\DoxyCodeLine{01145\ \textcolor{preprocessor}{\#define\ TIM\_CCx\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000001U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01146\ \textcolor{preprocessor}{\#define\ TIM\_CCx\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01147\ \textcolor{preprocessor}{\#define\ TIM\_CCxN\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000004U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01148\ \textcolor{preprocessor}{\#define\ TIM\_CCxN\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01152\ }
\DoxyCodeLine{01156\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_SYSTEM\_ECC\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ SYSCFG\_CFGR2\_ECCL\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01157\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_SYSTEM\_PVD\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ SYSCFG\_CFGR2\_PVDL\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01158\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_SYSTEM\_SRAM\_PARITY\_ERROR\ \ \ SYSCFG\_CFGR2\_SPL\ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{01159\ \textcolor{preprocessor}{\#define\ TIM\_BREAK\_SYSTEM\_LOCKUP\ \ \ \ \ \ \ \ \ \ \ \ \ \ SYSCFG\_CFGR2\_CLL\ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{01163\ }
\DoxyCodeLine{01167\ \textcolor{comment}{/*\ End\ of\ exported\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{01168\ }
\DoxyCodeLine{01169\ \textcolor{comment}{/*\ Exported\ macros\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{01173\ }
\DoxyCodeLine{01178\ \textcolor{preprocessor}{\#if\ (USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ ==\ 1)}}
\DoxyCodeLine{01179\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_RESET\_HANDLE\_STATE(\_\_HANDLE\_\_)\ do\ \{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01180\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>State\ \ \ \ \ \ \ \ \ \ \ \ =\ HAL\_TIM\_STATE\_RESET;\ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01181\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[0]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01182\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[1]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01183\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[2]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01184\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[3]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01185\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[4]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01186\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[5]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01187\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[0]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01188\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[1]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01189\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[2]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01190\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[3]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01191\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>DMABurstState\ \ \ \ =\ HAL\_DMA\_BURST\_STATE\_RESET;\ \ \ \(\backslash\)}}
\DoxyCodeLine{01192\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>Base\_MspInitCallback\ \ \ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01193\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>Base\_MspDeInitCallback\ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01194\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>IC\_MspInitCallback\ \ \ \ \ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01195\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>IC\_MspDeInitCallback\ \ \ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01196\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>OC\_MspInitCallback\ \ \ \ \ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01197\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>OC\_MspDeInitCallback\ \ \ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01198\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>PWM\_MspInitCallback\ \ \ \ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01199\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>PWM\_MspDeInitCallback\ \ \ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01200\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>OnePulse\_MspInitCallback\ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01201\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>OnePulse\_MspDeInitCallback\ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01202\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>Encoder\_MspInitCallback\ \ \ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01203\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>Encoder\_MspDeInitCallback\ \ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01204\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>HallSensor\_MspInitCallback\ \ \ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01205\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>HallSensor\_MspDeInitCallback\ =\ NULL;\ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01206\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \}\ while(0)}}
\DoxyCodeLine{01207\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{01208\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_RESET\_HANDLE\_STATE(\_\_HANDLE\_\_)\ do\ \{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01209\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>State\ \ \ \ \ \ \ \ \ \ \ \ =\ HAL\_TIM\_STATE\_RESET;\ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01210\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[0]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01211\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[1]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01212\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[2]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01213\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[3]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01214\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[4]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01215\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[5]\ \ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01216\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[0]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01217\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[1]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01218\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[2]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01219\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[3]\ =\ HAL\_TIM\_CHANNEL\_STATE\_RESET;\ \(\backslash\)}}
\DoxyCodeLine{01220\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>DMABurstState\ \ \ \ =\ HAL\_DMA\_BURST\_STATE\_RESET;\ \ \ \(\backslash\)}}
\DoxyCodeLine{01221\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \}\ while(0)}}
\DoxyCodeLine{01222\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01223\ }
\DoxyCodeLine{01229\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_ENABLE(\_\_HANDLE\_\_)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CR1|=(TIM\_CR1\_CEN))}}
\DoxyCodeLine{01230\ }
\DoxyCodeLine{01236\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_MOE\_ENABLE(\_\_HANDLE\_\_)\ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>BDTR|=(TIM\_BDTR\_MOE))}}
\DoxyCodeLine{01237\ }
\DoxyCodeLine{01243\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_DISABLE(\_\_HANDLE\_\_)\ \(\backslash\)}}
\DoxyCodeLine{01244\ \textcolor{preprocessor}{\ \ do\ \{\ \(\backslash\)}}
\DoxyCodeLine{01245\ \textcolor{preprocessor}{\ \ \ \ if\ (((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&\ TIM\_CCER\_CCxE\_MASK)\ ==\ 0UL)\ \(\backslash\)}}
\DoxyCodeLine{01246\ \textcolor{preprocessor}{\ \ \ \ \{\ \(\backslash\)}}
\DoxyCodeLine{01247\ \textcolor{preprocessor}{\ \ \ \ \ \ if(((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&\ TIM\_CCER\_CCxNE\_MASK)\ ==\ 0UL)\ \(\backslash\)}}
\DoxyCodeLine{01248\ \textcolor{preprocessor}{\ \ \ \ \ \ \{\ \(\backslash\)}}
\DoxyCodeLine{01249\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>Instance-\/>CR1\ \&=\ \string~(TIM\_CR1\_CEN);\ \(\backslash\)}}
\DoxyCodeLine{01250\ \textcolor{preprocessor}{\ \ \ \ \ \ \}\ \(\backslash\)}}
\DoxyCodeLine{01251\ \textcolor{preprocessor}{\ \ \ \ \}\ \(\backslash\)}}
\DoxyCodeLine{01252\ \textcolor{preprocessor}{\ \ \}\ while(0)}}
\DoxyCodeLine{01253\ }
\DoxyCodeLine{01261\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_MOE\_DISABLE(\_\_HANDLE\_\_)\ \(\backslash\)}}
\DoxyCodeLine{01262\ \textcolor{preprocessor}{\ \ do\ \{\ \(\backslash\)}}
\DoxyCodeLine{01263\ \textcolor{preprocessor}{\ \ \ \ if\ (((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&\ TIM\_CCER\_CCxE\_MASK)\ ==\ 0UL)\ \(\backslash\)}}
\DoxyCodeLine{01264\ \textcolor{preprocessor}{\ \ \ \ \{\ \(\backslash\)}}
\DoxyCodeLine{01265\ \textcolor{preprocessor}{\ \ \ \ \ \ if(((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&\ TIM\_CCER\_CCxNE\_MASK)\ ==\ 0UL)\ \(\backslash\)}}
\DoxyCodeLine{01266\ \textcolor{preprocessor}{\ \ \ \ \ \ \{\ \(\backslash\)}}
\DoxyCodeLine{01267\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>Instance-\/>BDTR\ \&=\ \string~(TIM\_BDTR\_MOE);\ \(\backslash\)}}
\DoxyCodeLine{01268\ \textcolor{preprocessor}{\ \ \ \ \ \ \}\ \(\backslash\)}}
\DoxyCodeLine{01269\ \textcolor{preprocessor}{\ \ \ \ \}\ \(\backslash\)}}
\DoxyCodeLine{01270\ \textcolor{preprocessor}{\ \ \}\ while(0)}}
\DoxyCodeLine{01271\ }
\DoxyCodeLine{01278\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_MOE\_DISABLE\_UNCONDITIONALLY(\_\_HANDLE\_\_)\ \ (\_\_HANDLE\_\_)-\/>Instance-\/>BDTR\ \&=\ \string~(TIM\_BDTR\_MOE)}}
\DoxyCodeLine{01279\ }
\DoxyCodeLine{01294\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_ENABLE\_IT(\_\_HANDLE\_\_,\ \_\_INTERRUPT\_\_)\ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>DIER\ |=\ (\_\_INTERRUPT\_\_))}}
\DoxyCodeLine{01295\ }
\DoxyCodeLine{01310\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_DISABLE\_IT(\_\_HANDLE\_\_,\ \_\_INTERRUPT\_\_)\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>DIER\ \&=\ \string~(\_\_INTERRUPT\_\_))}}
\DoxyCodeLine{01311\ }
\DoxyCodeLine{01325\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_ENABLE\_DMA(\_\_HANDLE\_\_,\ \_\_DMA\_\_)\ \ \ \ \ \ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>DIER\ |=\ (\_\_DMA\_\_))}}
\DoxyCodeLine{01326\ }
\DoxyCodeLine{01340\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_DISABLE\_DMA(\_\_HANDLE\_\_,\ \_\_DMA\_\_)\ \ \ \ \ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>DIER\ \&=\ \string~(\_\_DMA\_\_))}}
\DoxyCodeLine{01341\ }
\DoxyCodeLine{01364\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_FLAG(\_\_HANDLE\_\_,\ \_\_FLAG\_\_)\ \ \ \ \ \ \ \ \ \ (((\_\_HANDLE\_\_)-\/>Instance-\/>SR\ \&(\_\_FLAG\_\_))\ ==\ (\_\_FLAG\_\_))}}
\DoxyCodeLine{01365\ }
\DoxyCodeLine{01388\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_CLEAR\_FLAG(\_\_HANDLE\_\_,\ \_\_FLAG\_\_)\ \ \ \ \ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>SR\ =\ \string~(\_\_FLAG\_\_))}}
\DoxyCodeLine{01389\ }
\DoxyCodeLine{01405\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_IT\_SOURCE(\_\_HANDLE\_\_,\ \_\_INTERRUPT\_\_)\ ((((\_\_HANDLE\_\_)-\/>Instance-\/>DIER\ \&\ (\_\_INTERRUPT\_\_))\ \(\backslash\)}}
\DoxyCodeLine{01406\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ==\ (\_\_INTERRUPT\_\_))\ ?\ SET\ :\ RESET)}}
\DoxyCodeLine{01407\ }
\DoxyCodeLine{01422\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_CLEAR\_IT(\_\_HANDLE\_\_,\ \_\_INTERRUPT\_\_)\ \ \ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>SR\ =\ \string~(\_\_INTERRUPT\_\_))}}
\DoxyCodeLine{01423\ }
\DoxyCodeLine{01432\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_UIFREMAP\_ENABLE(\_\_HANDLE\_\_)\ \ \ \ (((\_\_HANDLE\_\_)-\/>Instance-\/>CR1\ |=\ TIM\_CR1\_UIFREMAP))}}
\DoxyCodeLine{01433\ }
\DoxyCodeLine{01440\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_UIFREMAP\_DISABLE(\_\_HANDLE\_\_)\ \ \ \ (((\_\_HANDLE\_\_)-\/>Instance-\/>CR1\ \&=\ \string~TIM\_CR1\_UIFREMAP))}}
\DoxyCodeLine{01441\ }
\DoxyCodeLine{01448\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_UIFCPY(\_\_COUNTER\_\_)\ \ \ \ (((\_\_COUNTER\_\_)\ \&\ (TIM\_CNT\_UIFCPY))\ ==\ (TIM\_CNT\_UIFCPY))}}
\DoxyCodeLine{01449\ }
\DoxyCodeLine{01457\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_IS\_TIM\_COUNTING\_DOWN(\_\_HANDLE\_\_)\ \ \ \ (((\_\_HANDLE\_\_)-\/>Instance-\/>CR1\ \&(TIM\_CR1\_DIR))\ ==\ (TIM\_CR1\_DIR))}}
\DoxyCodeLine{01458\ }
\DoxyCodeLine{01465\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SET\_PRESCALER(\_\_HANDLE\_\_,\ \_\_PRESC\_\_)\ \ \ \ \ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>PSC\ =\ (\_\_PRESC\_\_))}}
\DoxyCodeLine{01466\ }
\DoxyCodeLine{01476\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SET\_COUNTER(\_\_HANDLE\_\_,\ \_\_COUNTER\_\_)\ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CNT\ =\ (\_\_COUNTER\_\_))}}
\DoxyCodeLine{01477\ }
\DoxyCodeLine{01483\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_COUNTER(\_\_HANDLE\_\_)\ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CNT)}}
\DoxyCodeLine{01484\ }
\DoxyCodeLine{01491\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SET\_AUTORELOAD(\_\_HANDLE\_\_,\ \_\_AUTORELOAD\_\_)\ \(\backslash\)}}
\DoxyCodeLine{01492\ \textcolor{preprocessor}{\ \ do\{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01493\ \textcolor{preprocessor}{\ \ \ \ (\_\_HANDLE\_\_)-\/>Instance-\/>ARR\ =\ (\_\_AUTORELOAD\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{01494\ \textcolor{preprocessor}{\ \ \ \ (\_\_HANDLE\_\_)-\/>Init.Period\ =\ (\_\_AUTORELOAD\_\_);\ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01495\ \textcolor{preprocessor}{\ \ \}\ while(0)}}
\DoxyCodeLine{01496\ }
\DoxyCodeLine{01502\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_AUTORELOAD(\_\_HANDLE\_\_)\ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>ARR)}}
\DoxyCodeLine{01503\ }
\DoxyCodeLine{01514\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SET\_CLOCKDIVISION(\_\_HANDLE\_\_,\ \_\_CKD\_\_)\ \(\backslash\)}}
\DoxyCodeLine{01515\ \textcolor{preprocessor}{\ \ do\{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01516\ \textcolor{preprocessor}{\ \ \ \ (\_\_HANDLE\_\_)-\/>Instance-\/>CR1\ \&=\ (\string~TIM\_CR1\_CKD);\ \ \(\backslash\)}}
\DoxyCodeLine{01517\ \textcolor{preprocessor}{\ \ \ \ (\_\_HANDLE\_\_)-\/>Instance-\/>CR1\ |=\ (\_\_CKD\_\_);\ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01518\ \textcolor{preprocessor}{\ \ \ \ (\_\_HANDLE\_\_)-\/>Init.ClockDivision\ =\ (\_\_CKD\_\_);\ \ \ \(\backslash\)}}
\DoxyCodeLine{01519\ \textcolor{preprocessor}{\ \ \}\ while(0)}}
\DoxyCodeLine{01520\ }
\DoxyCodeLine{01529\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_CLOCKDIVISION(\_\_HANDLE\_\_)\ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CR1\ \&\ TIM\_CR1\_CKD)}}
\DoxyCodeLine{01530\ }
\DoxyCodeLine{01549\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SET\_ICPRESCALER(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_,\ \_\_ICPSC\_\_)\ \(\backslash\)}}
\DoxyCodeLine{01550\ \textcolor{preprocessor}{\ \ do\{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01551\ \textcolor{preprocessor}{\ \ \ \ TIM\_RESET\_ICPRESCALERVALUE((\_\_HANDLE\_\_),\ (\_\_CHANNEL\_\_));\ \ \(\backslash\)}}
\DoxyCodeLine{01552\ \textcolor{preprocessor}{\ \ \ \ TIM\_SET\_ICPRESCALERVALUE((\_\_HANDLE\_\_),\ (\_\_CHANNEL\_\_),\ (\_\_ICPSC\_\_));\ \(\backslash\)}}
\DoxyCodeLine{01553\ \textcolor{preprocessor}{\ \ \}\ while(0)}}
\DoxyCodeLine{01554\ }
\DoxyCodeLine{01570\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_ICPRESCALER(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \ \(\backslash\)}}
\DoxyCodeLine{01571\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&\ TIM\_CCMR1\_IC1PSC)\ :\(\backslash\)}}
\DoxyCodeLine{01572\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ (((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&\ TIM\_CCMR1\_IC2PSC)\ >>\ 8U)\ :\(\backslash\)}}
\DoxyCodeLine{01573\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&\ TIM\_CCMR2\_IC3PSC)\ :\(\backslash\)}}
\DoxyCodeLine{01574\ \textcolor{preprocessor}{\ \ \ (((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&\ TIM\_CCMR2\_IC4PSC))\ >>\ 8U)}}
\DoxyCodeLine{01575\ }
\DoxyCodeLine{01590\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SET\_COMPARE(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_,\ \_\_COMPARE\_\_)\ \(\backslash\)}}
\DoxyCodeLine{01591\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR1\ =\ (\_\_COMPARE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{01592\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR2\ =\ (\_\_COMPARE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{01593\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR3\ =\ (\_\_COMPARE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{01594\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR4\ =\ (\_\_COMPARE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{01595\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR5\ =\ (\_\_COMPARE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{01596\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR6\ =\ (\_\_COMPARE\_\_)))}}
\DoxyCodeLine{01597\ }
\DoxyCodeLine{01611\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_GET\_COMPARE(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \(\backslash\)}}
\DoxyCodeLine{01612\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR1)\ :\(\backslash\)}}
\DoxyCodeLine{01613\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR2)\ :\(\backslash\)}}
\DoxyCodeLine{01614\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR3)\ :\(\backslash\)}}
\DoxyCodeLine{01615\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR4)\ :\(\backslash\)}}
\DoxyCodeLine{01616\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR5)\ :\(\backslash\)}}
\DoxyCodeLine{01617\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCR6))}}
\DoxyCodeLine{01618\ }
\DoxyCodeLine{01632\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_ENABLE\_OCxPRELOAD(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01633\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ |=\ TIM\_CCMR1\_OC1PE)\ :\(\backslash\)}}
\DoxyCodeLine{01634\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ |=\ TIM\_CCMR1\_OC2PE)\ :\(\backslash\)}}
\DoxyCodeLine{01635\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ |=\ TIM\_CCMR2\_OC3PE)\ :\(\backslash\)}}
\DoxyCodeLine{01636\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ |=\ TIM\_CCMR2\_OC4PE)\ :\(\backslash\)}}
\DoxyCodeLine{01637\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ |=\ TIM\_CCMR3\_OC5PE)\ :\(\backslash\)}}
\DoxyCodeLine{01638\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ |=\ TIM\_CCMR3\_OC6PE))}}
\DoxyCodeLine{01639\ }
\DoxyCodeLine{01653\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_DISABLE\_OCxPRELOAD(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01654\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&=\ \string~TIM\_CCMR1\_OC1PE)\ :\(\backslash\)}}
\DoxyCodeLine{01655\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&=\ \string~TIM\_CCMR1\_OC2PE)\ :\(\backslash\)}}
\DoxyCodeLine{01656\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&=\ \string~TIM\_CCMR2\_OC3PE)\ :\(\backslash\)}}
\DoxyCodeLine{01657\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&=\ \string~TIM\_CCMR2\_OC4PE)\ :\(\backslash\)}}
\DoxyCodeLine{01658\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ \&=\ \string~TIM\_CCMR3\_OC5PE)\ :\(\backslash\)}}
\DoxyCodeLine{01659\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ \&=\ \string~TIM\_CCMR3\_OC6PE))}}
\DoxyCodeLine{01660\ }
\DoxyCodeLine{01678\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_ENABLE\_OCxFAST(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01679\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ |=\ TIM\_CCMR1\_OC1FE)\ :\(\backslash\)}}
\DoxyCodeLine{01680\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ |=\ TIM\_CCMR1\_OC2FE)\ :\(\backslash\)}}
\DoxyCodeLine{01681\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ |=\ TIM\_CCMR2\_OC3FE)\ :\(\backslash\)}}
\DoxyCodeLine{01682\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ |=\ TIM\_CCMR2\_OC4FE)\ :\(\backslash\)}}
\DoxyCodeLine{01683\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ |=\ TIM\_CCMR3\_OC5FE)\ :\(\backslash\)}}
\DoxyCodeLine{01684\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ |=\ TIM\_CCMR3\_OC6FE))}}
\DoxyCodeLine{01685\ }
\DoxyCodeLine{01703\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_DISABLE\_OCxFAST(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01704\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&=\ \string~TIM\_CCMR1\_OC1FE)\ :\(\backslash\)}}
\DoxyCodeLine{01705\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&=\ \string~TIM\_CCMR1\_OC2FE)\ :\(\backslash\)}}
\DoxyCodeLine{01706\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&=\ \string~TIM\_CCMR2\_OC3FE)\ :\(\backslash\)}}
\DoxyCodeLine{01707\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&=\ \string~TIM\_CCMR2\_OC4FE)\ :\(\backslash\)}}
\DoxyCodeLine{01708\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ \&=\ \string~TIM\_CCMR3\_OC5FE)\ :\(\backslash\)}}
\DoxyCodeLine{01709\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR3\ \&=\ \string~TIM\_CCMR3\_OC6FE))}}
\DoxyCodeLine{01710\ }
\DoxyCodeLine{01719\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_URS\_ENABLE(\_\_HANDLE\_\_)\ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CR1|=\ TIM\_CR1\_URS)}}
\DoxyCodeLine{01720\ }
\DoxyCodeLine{01732\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_URS\_DISABLE(\_\_HANDLE\_\_)\ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CR1\&=\string~TIM\_CR1\_URS)}}
\DoxyCodeLine{01733\ }
\DoxyCodeLine{01749\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SET\_CAPTUREPOLARITY(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_,\ \_\_POLARITY\_\_)\ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01750\ \textcolor{preprocessor}{\ \ do\{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01751\ \textcolor{preprocessor}{\ \ \ \ TIM\_RESET\_CAPTUREPOLARITY((\_\_HANDLE\_\_),\ (\_\_CHANNEL\_\_));\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01752\ \textcolor{preprocessor}{\ \ \ \ TIM\_SET\_CAPTUREPOLARITY((\_\_HANDLE\_\_),\ (\_\_CHANNEL\_\_),\ (\_\_POLARITY\_\_));\ \(\backslash\)}}
\DoxyCodeLine{01753\ \textcolor{preprocessor}{\ \ \}while(0)}}
\DoxyCodeLine{01754\ }
\DoxyCodeLine{01763\ \textcolor{preprocessor}{\#define\ \_\_HAL\_TIM\_SELECT\_CCDMAREQUEST(\_\_HANDLE\_\_,\ \_\_CCDMA\_\_)\ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01764\ \textcolor{preprocessor}{\ \ MODIFY\_REG((\_\_HANDLE\_\_)-\/>Instance-\/>CR2,\ TIM\_CR2\_CCDS,\ (\_\_CCDMA\_\_))}}
\DoxyCodeLine{01765\ }
\DoxyCodeLine{01769\ \textcolor{comment}{/*\ End\ of\ exported\ macros\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{01770\ }
\DoxyCodeLine{01771\ \textcolor{comment}{/*\ Private\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{01775\ \textcolor{comment}{/*\ The\ counter\ of\ a\ timer\ instance\ is\ disabled\ only\ if\ all\ the\ CCx\ and\ CCxN}}
\DoxyCodeLine{01776\ \textcolor{comment}{\ \ \ channels\ have\ been\ disabled\ */}}
\DoxyCodeLine{01777\ \textcolor{preprocessor}{\#define\ TIM\_CCER\_CCxE\_MASK\ \ ((uint32\_t)(TIM\_CCER\_CC1E\ |\ TIM\_CCER\_CC2E\ |\ TIM\_CCER\_CC3E\ |\ TIM\_CCER\_CC4E))}}
\DoxyCodeLine{01778\ \textcolor{preprocessor}{\#define\ TIM\_CCER\_CCxNE\_MASK\ ((uint32\_t)(TIM\_CCER\_CC1NE\ |\ TIM\_CCER\_CC2NE\ |\ TIM\_CCER\_CC3NE))}\textcolor{preprocessor}{}}
\DoxyCodeLine{01782\ \textcolor{comment}{/*\ End\ of\ private\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{01783\ }
\DoxyCodeLine{01784\ \textcolor{comment}{/*\ Private\ macros\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{01788\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLEARINPUT\_SOURCE(\_\_MODE\_\_)\ \ (((\_\_MODE\_\_)\ ==\ TIM\_CLEARINPUTSOURCE\_NONE)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01789\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_CLEARINPUTSOURCE\_ETR))}}
\DoxyCodeLine{01790\ }
\DoxyCodeLine{01791\ \textcolor{preprocessor}{\#define\ IS\_TIM\_DMA\_BASE(\_\_BASE\_\_)\ (((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CR1)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01792\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CR2)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01793\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_SMCR)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01794\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_DIER)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01795\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_SR)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01796\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_EGR)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01797\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCMR1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01798\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCMR2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01799\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCER)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01800\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CNT)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01801\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_PSC)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01802\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_ARR)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01803\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_RCR)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01804\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCR1)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01805\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCR2)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01806\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCR3)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01807\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCR4)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01808\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_BDTR)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01809\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCMR3)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01810\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCR5)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01811\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_CCR6)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01812\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_AF1)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01813\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_AF2)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01814\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_BASE\_\_)\ ==\ TIM\_DMABASE\_TISEL))}}
\DoxyCodeLine{01815\ }
\DoxyCodeLine{01816\ }
\DoxyCodeLine{01817\ \textcolor{preprocessor}{\#define\ IS\_TIM\_EVENT\_SOURCE(\_\_SOURCE\_\_)\ ((((\_\_SOURCE\_\_)\ \&\ 0xFFFFFE00U)\ ==\ 0x00000000U)\ \&\&\ ((\_\_SOURCE\_\_)\ !=\ 0x00000000U))}}
\DoxyCodeLine{01818\ }
\DoxyCodeLine{01819\ \textcolor{preprocessor}{\#define\ IS\_TIM\_COUNTER\_MODE(\_\_MODE\_\_)\ \ \ \ \ \ (((\_\_MODE\_\_)\ ==\ TIM\_COUNTERMODE\_UP)\ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01820\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_COUNTERMODE\_DOWN)\ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01821\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_COUNTERMODE\_CENTERALIGNED1)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01822\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_COUNTERMODE\_CENTERALIGNED2)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01823\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_COUNTERMODE\_CENTERALIGNED3))}}
\DoxyCodeLine{01824\ }
\DoxyCodeLine{01825\ \textcolor{preprocessor}{\#define\ IS\_TIM\_UIFREMAP\_MODE(\_\_MODE\_\_)\ \ \ \ \ (((\_\_MODE\_\_)\ ==\ TIM\_UIFREMAP\_DISABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01826\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_UIFREMAP\_ENABLE))}}
\DoxyCodeLine{01827\ }
\DoxyCodeLine{01828\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLOCKDIVISION\_DIV(\_\_DIV\_\_)\ \ (((\_\_DIV\_\_)\ ==\ TIM\_CLOCKDIVISION\_DIV1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01829\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_DIV\_\_)\ ==\ TIM\_CLOCKDIVISION\_DIV2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01830\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_DIV\_\_)\ ==\ TIM\_CLOCKDIVISION\_DIV4))}}
\DoxyCodeLine{01831\ }
\DoxyCodeLine{01832\ \textcolor{preprocessor}{\#define\ IS\_TIM\_AUTORELOAD\_PRELOAD(PRELOAD)\ (((PRELOAD)\ ==\ TIM\_AUTORELOAD\_PRELOAD\_DISABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01833\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((PRELOAD)\ ==\ TIM\_AUTORELOAD\_PRELOAD\_ENABLE))}}
\DoxyCodeLine{01834\ }
\DoxyCodeLine{01835\ \textcolor{preprocessor}{\#define\ IS\_TIM\_FAST\_STATE(\_\_STATE\_\_)\ \ \ \ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_OCFAST\_DISABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01836\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_OCFAST\_ENABLE))}}
\DoxyCodeLine{01837\ }
\DoxyCodeLine{01838\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OC\_POLARITY(\_\_POLARITY\_\_)\ \ \ (((\_\_POLARITY\_\_)\ ==\ TIM\_OCPOLARITY\_HIGH)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01839\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_OCPOLARITY\_LOW))}}
\DoxyCodeLine{01840\ }
\DoxyCodeLine{01841\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OCN\_POLARITY(\_\_POLARITY\_\_)\ \ (((\_\_POLARITY\_\_)\ ==\ TIM\_OCNPOLARITY\_HIGH)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01842\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_OCNPOLARITY\_LOW))}}
\DoxyCodeLine{01843\ }
\DoxyCodeLine{01844\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OCIDLE\_STATE(\_\_STATE\_\_)\ \ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_OCIDLESTATE\_SET)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01845\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_OCIDLESTATE\_RESET))}}
\DoxyCodeLine{01846\ }
\DoxyCodeLine{01847\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OCNIDLE\_STATE(\_\_STATE\_\_)\ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_OCNIDLESTATE\_SET)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01848\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_OCNIDLESTATE\_RESET))}}
\DoxyCodeLine{01849\ }
\DoxyCodeLine{01850\ \textcolor{preprocessor}{\#define\ IS\_TIM\_ENCODERINPUT\_POLARITY(\_\_POLARITY\_\_)\ \ \ (((\_\_POLARITY\_\_)\ ==\ TIM\_ENCODERINPUTPOLARITY\_RISING)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01851\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_ENCODERINPUTPOLARITY\_FALLING))}}
\DoxyCodeLine{01852\ }
\DoxyCodeLine{01853\ \textcolor{preprocessor}{\#define\ IS\_TIM\_IC\_POLARITY(\_\_POLARITY\_\_)\ \ \ (((\_\_POLARITY\_\_)\ ==\ TIM\_ICPOLARITY\_RISING)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01854\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_ICPOLARITY\_FALLING)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01855\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_ICPOLARITY\_BOTHEDGE))}}
\DoxyCodeLine{01856\ }
\DoxyCodeLine{01857\ \textcolor{preprocessor}{\#define\ IS\_TIM\_IC\_SELECTION(\_\_SELECTION\_\_)\ (((\_\_SELECTION\_\_)\ ==\ TIM\_ICSELECTION\_DIRECTTI)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01858\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_ICSELECTION\_INDIRECTTI)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01859\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_ICSELECTION\_TRC))}}
\DoxyCodeLine{01860\ }
\DoxyCodeLine{01861\ \textcolor{preprocessor}{\#define\ IS\_TIM\_IC\_PRESCALER(\_\_PRESCALER\_\_)\ (((\_\_PRESCALER\_\_)\ ==\ TIM\_ICPSC\_DIV1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01862\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_ICPSC\_DIV2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01863\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_ICPSC\_DIV4)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01864\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_ICPSC\_DIV8))}}
\DoxyCodeLine{01865\ }
\DoxyCodeLine{01866\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CCX\_CHANNEL(\_\_INSTANCE\_\_,\ \_\_CHANNEL\_\_)\ (IS\_TIM\_CCX\_INSTANCE(\_\_INSTANCE\_\_,\ \_\_CHANNEL\_\_)\ \&\&\ \(\backslash\)}}
\DoxyCodeLine{01867\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ !=\ (TIM\_CHANNEL\_5))\ \&\&\ \(\backslash\)}}
\DoxyCodeLine{01868\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ !=\ (TIM\_CHANNEL\_6)))}}
\DoxyCodeLine{01869\ }
\DoxyCodeLine{01870\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OPM\_MODE(\_\_MODE\_\_)\ \ \ \ \ \ \ \ \ \ (((\_\_MODE\_\_)\ ==\ TIM\_OPMODE\_SINGLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01871\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OPMODE\_REPETITIVE))}}
\DoxyCodeLine{01872\ }
\DoxyCodeLine{01873\ \textcolor{preprocessor}{\#define\ IS\_TIM\_ENCODER\_MODE(\_\_MODE\_\_)\ \ \ \ \ \ (((\_\_MODE\_\_)\ ==\ TIM\_ENCODERMODE\_TI1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01874\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_ENCODERMODE\_TI2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01875\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_ENCODERMODE\_TI12))}}
\DoxyCodeLine{01876\ }
\DoxyCodeLine{01877\ \textcolor{preprocessor}{\#define\ IS\_TIM\_DMA\_SOURCE(\_\_SOURCE\_\_)\ ((((\_\_SOURCE\_\_)\ \&\ 0xFFFF80FFU)\ ==\ 0x00000000U)\ \&\&\ ((\_\_SOURCE\_\_)\ !=\ 0x00000000U))}}
\DoxyCodeLine{01878\ }
\DoxyCodeLine{01879\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CHANNELS(\_\_CHANNEL\_\_)\ \ \ \ \ \ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01880\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01881\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01882\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01883\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01884\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_6)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01885\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_ALL))}}
\DoxyCodeLine{01886\ }
\DoxyCodeLine{01887\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OPM\_CHANNELS(\_\_CHANNEL\_\_)\ \ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01888\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2))}}
\DoxyCodeLine{01889\ }
\DoxyCodeLine{01890\ \textcolor{preprocessor}{\#define\ IS\_TIM\_PERIOD(\_\_HANDLE\_\_,\ \_\_PERIOD\_\_)\ ((IS\_TIM\_32B\_COUNTER\_INSTANCE(((\_\_HANDLE\_\_)-\/>Instance))\ ==\ 0U)\ ?\ \(\backslash\)}}
\DoxyCodeLine{01891\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_PERIOD\_\_)\ >\ 0U)\ \&\&\ ((\_\_PERIOD\_\_)\ <=\ 0x0000FFFFU))\ :\ \ \ \ \ \ \ \ \(\backslash\)}}
\DoxyCodeLine{01892\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PERIOD\_\_)\ >\ 0U))}}
\DoxyCodeLine{01893\ }
\DoxyCodeLine{01894\ \textcolor{preprocessor}{\#define\ IS\_TIM\_COMPLEMENTARY\_CHANNELS(\_\_CHANNEL\_\_)\ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01895\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01896\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3))}}
\DoxyCodeLine{01897\ }
\DoxyCodeLine{01898\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLOCKSOURCE(\_\_CLOCK\_\_)\ (((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_INTERNAL)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01899\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_ETRMODE1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01900\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_ETRMODE2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01901\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_TI1ED)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01902\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_TI1)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01903\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_TI2)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01904\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_ITR0)\ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01905\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_ITR1)\ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01906\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_ITR2)\ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01907\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CLOCK\_\_)\ ==\ TIM\_CLOCKSOURCE\_ITR3))}}
\DoxyCodeLine{01908\ }
\DoxyCodeLine{01909\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLOCKPOLARITY(\_\_POLARITY\_\_)\ (((\_\_POLARITY\_\_)\ ==\ TIM\_CLOCKPOLARITY\_INVERTED)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01910\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_CLOCKPOLARITY\_NONINVERTED)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01911\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_CLOCKPOLARITY\_RISING)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01912\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_CLOCKPOLARITY\_FALLING)\ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01913\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_CLOCKPOLARITY\_BOTHEDGE))}}
\DoxyCodeLine{01914\ }
\DoxyCodeLine{01915\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLOCKPRESCALER(\_\_PRESCALER\_\_)\ (((\_\_PRESCALER\_\_)\ ==\ TIM\_CLOCKPRESCALER\_DIV1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01916\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_CLOCKPRESCALER\_DIV2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01917\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_CLOCKPRESCALER\_DIV4)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01918\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_CLOCKPRESCALER\_DIV8))}}
\DoxyCodeLine{01919\ }
\DoxyCodeLine{01920\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLOCKFILTER(\_\_ICFILTER\_\_)\ \ \ \ \ \ ((\_\_ICFILTER\_\_)\ <=\ 0xFU)}}
\DoxyCodeLine{01921\ }
\DoxyCodeLine{01922\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLEARINPUT\_POLARITY(\_\_POLARITY\_\_)\ (((\_\_POLARITY\_\_)\ ==\ TIM\_CLEARINPUTPOLARITY\_INVERTED)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01923\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_CLEARINPUTPOLARITY\_NONINVERTED))}}
\DoxyCodeLine{01924\ }
\DoxyCodeLine{01925\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLEARINPUT\_PRESCALER(\_\_PRESCALER\_\_)\ (((\_\_PRESCALER\_\_)\ ==\ TIM\_CLEARINPUTPRESCALER\_DIV1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01926\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_CLEARINPUTPRESCALER\_DIV2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01927\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_CLEARINPUTPRESCALER\_DIV4)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01928\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_CLEARINPUTPRESCALER\_DIV8))}}
\DoxyCodeLine{01929\ }
\DoxyCodeLine{01930\ \textcolor{preprocessor}{\#define\ IS\_TIM\_CLEARINPUT\_FILTER(\_\_ICFILTER\_\_)\ ((\_\_ICFILTER\_\_)\ <=\ 0xFU)}}
\DoxyCodeLine{01931\ }
\DoxyCodeLine{01932\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OSSR\_STATE(\_\_STATE\_\_)\ \ \ \ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_OSSR\_ENABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01933\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_OSSR\_DISABLE))}}
\DoxyCodeLine{01934\ }
\DoxyCodeLine{01935\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OSSI\_STATE(\_\_STATE\_\_)\ \ \ \ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_OSSI\_ENABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01936\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_OSSI\_DISABLE))}}
\DoxyCodeLine{01937\ }
\DoxyCodeLine{01938\ \textcolor{preprocessor}{\#define\ IS\_TIM\_LOCK\_LEVEL(\_\_LEVEL\_\_)\ \ \ \ \ \ \ (((\_\_LEVEL\_\_)\ ==\ TIM\_LOCKLEVEL\_OFF)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01939\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LEVEL\_\_)\ ==\ TIM\_LOCKLEVEL\_1)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01940\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LEVEL\_\_)\ ==\ TIM\_LOCKLEVEL\_2)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01941\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LEVEL\_\_)\ ==\ TIM\_LOCKLEVEL\_3))}}
\DoxyCodeLine{01942\ }
\DoxyCodeLine{01943\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK\_FILTER(\_\_BRKFILTER\_\_)\ ((\_\_BRKFILTER\_\_)\ <=\ 0xFUL)}}
\DoxyCodeLine{01944\ }
\DoxyCodeLine{01945\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK\_STATE(\_\_STATE\_\_)\ \ \ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_BREAK\_ENABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01946\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_BREAK\_DISABLE))}}
\DoxyCodeLine{01947\ }
\DoxyCodeLine{01948\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK\_POLARITY(\_\_POLARITY\_\_)\ (((\_\_POLARITY\_\_)\ ==\ TIM\_BREAKPOLARITY\_LOW)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01949\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_BREAKPOLARITY\_HIGH))}}
\DoxyCodeLine{01950\ \textcolor{preprocessor}{\#if\ \ defined(TIM\_BDTR\_BKBID)}}
\DoxyCodeLine{01951\ }
\DoxyCodeLine{01952\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK\_AFMODE(\_\_AFMODE\_\_)\ (((\_\_AFMODE\_\_)\ ==\ TIM\_BREAK\_AFMODE\_INPUT)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01953\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_AFMODE\_\_)\ ==\ TIM\_BREAK\_AFMODE\_BIDIRECTIONAL))}}
\DoxyCodeLine{01954\ }
\DoxyCodeLine{01955\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM\_BDTR\_BKBID\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01956\ }
\DoxyCodeLine{01957\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK2\_STATE(\_\_STATE\_\_)\ \ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_BREAK2\_ENABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01958\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_BREAK2\_DISABLE))}}
\DoxyCodeLine{01959\ }
\DoxyCodeLine{01960\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK2\_POLARITY(\_\_POLARITY\_\_)\ (((\_\_POLARITY\_\_)\ ==\ TIM\_BREAK2POLARITY\_LOW)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01961\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_BREAK2POLARITY\_HIGH))}}
\DoxyCodeLine{01962\ \textcolor{preprocessor}{\#if\ \ defined(TIM\_BDTR\_BKBID)}}
\DoxyCodeLine{01963\ }
\DoxyCodeLine{01964\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK2\_AFMODE(\_\_AFMODE\_\_)\ (((\_\_AFMODE\_\_)\ ==\ TIM\_BREAK2\_AFMODE\_INPUT)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01965\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_AFMODE\_\_)\ ==\ TIM\_BREAK2\_AFMODE\_BIDIRECTIONAL))}}
\DoxyCodeLine{01966\ }
\DoxyCodeLine{01967\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM\_BDTR\_BKBID\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{01968\ }
\DoxyCodeLine{01969\ \textcolor{preprocessor}{\#define\ IS\_TIM\_AUTOMATIC\_OUTPUT\_STATE(\_\_STATE\_\_)\ (((\_\_STATE\_\_)\ ==\ TIM\_AUTOMATICOUTPUT\_ENABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01970\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_AUTOMATICOUTPUT\_DISABLE))}}
\DoxyCodeLine{01971\ }
\DoxyCodeLine{01972\ \textcolor{preprocessor}{\#define\ IS\_TIM\_GROUPCH5(\_\_OCREF\_\_)\ ((((\_\_OCREF\_\_)\ \&\ 0x1FFFFFFFU)\ ==\ 0x00000000U))}}
\DoxyCodeLine{01973\ }
\DoxyCodeLine{01974\ \textcolor{preprocessor}{\#define\ IS\_TIM\_TRGO\_SOURCE(\_\_SOURCE\_\_)\ (((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_RESET)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01975\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_ENABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01976\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_UPDATE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01977\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_OC1)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01978\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_OC1REF)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01979\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_OC2REF)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01980\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_OC3REF)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01981\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO\_OC4REF))}}
\DoxyCodeLine{01982\ }
\DoxyCodeLine{01983\ \textcolor{preprocessor}{\#define\ IS\_TIM\_TRGO2\_SOURCE(\_\_SOURCE\_\_)\ (((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_RESET)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01984\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_ENABLE)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01985\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_UPDATE)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01986\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01987\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC1REF)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01988\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC2REF)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01989\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC3REF)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01990\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC3REF)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01991\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC4REF)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01992\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC5REF)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01993\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC6REF)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01994\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC4REF\_RISINGFALLING)\ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01995\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC6REF\_RISINGFALLING)\ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01996\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC4REF\_RISING\_OC6REF\_RISING)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01997\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC4REF\_RISING\_OC6REF\_FALLING)\ ||\ \(\backslash\)}}
\DoxyCodeLine{01998\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC5REF\_RISING\_OC6REF\_RISING)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{01999\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SOURCE\_\_)\ ==\ TIM\_TRGO2\_OC5REF\_RISING\_OC6REF\_FALLING))}}
\DoxyCodeLine{02000\ }
\DoxyCodeLine{02001\ \textcolor{preprocessor}{\#define\ IS\_TIM\_MSM\_STATE(\_\_STATE\_\_)\ \ \ \ \ \ (((\_\_STATE\_\_)\ ==\ TIM\_MASTERSLAVEMODE\_ENABLE)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02002\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_STATE\_\_)\ ==\ TIM\_MASTERSLAVEMODE\_DISABLE))}}
\DoxyCodeLine{02003\ }
\DoxyCodeLine{02004\ \textcolor{preprocessor}{\#define\ IS\_TIM\_SLAVE\_MODE(\_\_MODE\_\_)\ (((\_\_MODE\_\_)\ ==\ TIM\_SLAVEMODE\_DISABLE)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02005\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_SLAVEMODE\_RESET)\ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02006\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_SLAVEMODE\_GATED)\ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02007\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_SLAVEMODE\_TRIGGER)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02008\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_SLAVEMODE\_EXTERNAL1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02009\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_SLAVEMODE\_COMBINED\_RESETTRIGGER))}}
\DoxyCodeLine{02010\ }
\DoxyCodeLine{02011\ \textcolor{preprocessor}{\#define\ IS\_TIM\_PWM\_MODE(\_\_MODE\_\_)\ (((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_PWM1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02012\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_PWM2)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02013\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_COMBINED\_PWM1)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02014\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_COMBINED\_PWM2)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02015\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_ASYMMETRIC\_PWM1)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02016\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_ASYMMETRIC\_PWM2))}}
\DoxyCodeLine{02017\ }
\DoxyCodeLine{02018\ \textcolor{preprocessor}{\#define\ IS\_TIM\_OC\_MODE(\_\_MODE\_\_)\ \ (((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_TIMING)\ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02019\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_ACTIVE)\ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02020\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_INACTIVE)\ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02021\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_TOGGLE)\ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02022\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_FORCED\_ACTIVE)\ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02023\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_FORCED\_INACTIVE)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02024\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_RETRIGERRABLE\_OPM1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02025\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_MODE\_\_)\ ==\ TIM\_OCMODE\_RETRIGERRABLE\_OPM2))}}
\DoxyCodeLine{02026\ }
\DoxyCodeLine{02027\ \textcolor{preprocessor}{\#define\ IS\_TIM\_TRIGGER\_SELECTION(\_\_SELECTION\_\_)\ (((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR0)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02028\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR1)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02029\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR2)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02030\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR3)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02031\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR4)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02032\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR5)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02033\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR6)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02034\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR7)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02035\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR8)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02036\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR12)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02037\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR13)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02038\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_TI1F\_ED)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02039\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_TI1FP1)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02040\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_TI2FP2)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02041\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ETRF))}}
\DoxyCodeLine{02042\ }
\DoxyCodeLine{02043\ \textcolor{preprocessor}{\#define\ IS\_TIM\_INTERNAL\_TRIGGEREVENT\_SELECTION(\_\_SELECTION\_\_)\ (((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR0)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02044\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR1)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02045\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR2)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02046\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR3)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02047\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR4)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02048\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR5)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02049\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR6)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02050\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR7)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02051\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR8)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02052\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR12)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02053\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_ITR13)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02054\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_SELECTION\_\_)\ ==\ TIM\_TS\_NONE))}}
\DoxyCodeLine{02055\ }
\DoxyCodeLine{02056\ \textcolor{preprocessor}{\#define\ IS\_TIM\_TRIGGERPOLARITY(\_\_POLARITY\_\_)\ \ \ (((\_\_POLARITY\_\_)\ ==\ TIM\_TRIGGERPOLARITY\_INVERTED\ \ \ )\ ||\ \(\backslash\)}}
\DoxyCodeLine{02057\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_TRIGGERPOLARITY\_NONINVERTED)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02058\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_TRIGGERPOLARITY\_RISING\ \ \ \ \ )\ ||\ \(\backslash\)}}
\DoxyCodeLine{02059\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_TRIGGERPOLARITY\_FALLING\ \ \ \ )\ ||\ \(\backslash\)}}
\DoxyCodeLine{02060\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_POLARITY\_\_)\ ==\ TIM\_TRIGGERPOLARITY\_BOTHEDGE\ \ \ ))}}
\DoxyCodeLine{02061\ }
\DoxyCodeLine{02062\ \textcolor{preprocessor}{\#define\ IS\_TIM\_TRIGGERPRESCALER(\_\_PRESCALER\_\_)\ (((\_\_PRESCALER\_\_)\ ==\ TIM\_TRIGGERPRESCALER\_DIV1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02063\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_TRIGGERPRESCALER\_DIV2)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02064\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_TRIGGERPRESCALER\_DIV4)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02065\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_PRESCALER\_\_)\ ==\ TIM\_TRIGGERPRESCALER\_DIV8))}}
\DoxyCodeLine{02066\ }
\DoxyCodeLine{02067\ \textcolor{preprocessor}{\#define\ IS\_TIM\_TRIGGERFILTER(\_\_ICFILTER\_\_)\ ((\_\_ICFILTER\_\_)\ <=\ 0xFU)}}
\DoxyCodeLine{02068\ }
\DoxyCodeLine{02069\ \textcolor{preprocessor}{\#define\ IS\_TIM\_TI1SELECTION(\_\_TI1SELECTION\_\_)\ \ (((\_\_TI1SELECTION\_\_)\ ==\ TIM\_TI1SELECTION\_CH1)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02070\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_TI1SELECTION\_\_)\ ==\ TIM\_TI1SELECTION\_XORCOMBINATION))}}
\DoxyCodeLine{02071\ }
\DoxyCodeLine{02072\ \textcolor{preprocessor}{\#define\ IS\_TIM\_DMA\_LENGTH(\_\_LENGTH\_\_)\ \ \ \ \ \ (((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_1TRANSFER)\ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02073\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_2TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02074\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_3TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02075\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_4TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02076\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_5TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02077\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_6TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02078\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_7TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02079\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_8TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02080\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_9TRANSFERS)\ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02081\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_10TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02082\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_11TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02083\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_12TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02084\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_13TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02085\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_14TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02086\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_15TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02087\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_16TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02088\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_17TRANSFERS)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02089\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_LENGTH\_\_)\ ==\ TIM\_DMABURSTLENGTH\_18TRANSFERS))}}
\DoxyCodeLine{02090\ }
\DoxyCodeLine{02091\ \textcolor{preprocessor}{\#define\ IS\_TIM\_DMA\_DATA\_LENGTH(LENGTH)\ (((LENGTH)\ >=\ 0x1U)\ \&\&\ ((LENGTH)\ <\ 0x10000U))}}
\DoxyCodeLine{02092\ }
\DoxyCodeLine{02093\ \textcolor{preprocessor}{\#define\ IS\_TIM\_IC\_FILTER(\_\_ICFILTER\_\_)\ \ \ ((\_\_ICFILTER\_\_)\ <=\ 0xFU)}}
\DoxyCodeLine{02094\ }
\DoxyCodeLine{02095\ \textcolor{preprocessor}{\#define\ IS\_TIM\_DEADTIME(\_\_DEADTIME\_\_)\ \ \ \ ((\_\_DEADTIME\_\_)\ <=\ 0xFFU)}}
\DoxyCodeLine{02096\ }
\DoxyCodeLine{02097\ \textcolor{preprocessor}{\#define\ IS\_TIM\_BREAK\_SYSTEM(\_\_CONFIG\_\_)\ \ \ \ (((\_\_CONFIG\_\_)\ ==\ TIM\_BREAK\_SYSTEM\_ECC)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02098\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CONFIG\_\_)\ ==\ TIM\_BREAK\_SYSTEM\_PVD)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02099\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CONFIG\_\_)\ ==\ TIM\_BREAK\_SYSTEM\_SRAM\_PARITY\_ERROR)\ \ \ \ ||\ \(\backslash\)}}
\DoxyCodeLine{02100\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_CONFIG\_\_)\ ==\ TIM\_BREAK\_SYSTEM\_LOCKUP))}}
\DoxyCodeLine{02101\ }
\DoxyCodeLine{02102\ \textcolor{preprocessor}{\#define\ IS\_TIM\_SLAVEMODE\_TRIGGER\_ENABLED(\_\_TRIGGER\_\_)\ (((\_\_TRIGGER\_\_)\ ==\ TIM\_SLAVEMODE\_TRIGGER)\ ||\ \(\backslash\)}}
\DoxyCodeLine{02103\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((\_\_TRIGGER\_\_)\ ==\ TIM\_SLAVEMODE\_COMBINED\_RESETTRIGGER))}}
\DoxyCodeLine{02104\ }
\DoxyCodeLine{02105\ \textcolor{preprocessor}{\#define\ TIM\_SET\_ICPRESCALERVALUE(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_,\ \_\_ICPSC\_\_)\ \(\backslash\)}}
\DoxyCodeLine{02106\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ |=\ (\_\_ICPSC\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02107\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ |=\ ((\_\_ICPSC\_\_)\ <<\ 8U))\ :\(\backslash\)}}
\DoxyCodeLine{02108\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ |=\ (\_\_ICPSC\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02109\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ |=\ ((\_\_ICPSC\_\_)\ <<\ 8U)))}}
\DoxyCodeLine{02110\ }
\DoxyCodeLine{02111\ \textcolor{preprocessor}{\#define\ TIM\_RESET\_ICPRESCALERVALUE(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \(\backslash\)}}
\DoxyCodeLine{02112\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&=\ \string~TIM\_CCMR1\_IC1PSC)\ :\(\backslash\)}}
\DoxyCodeLine{02113\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR1\ \&=\ \string~TIM\_CCMR1\_IC2PSC)\ :\(\backslash\)}}
\DoxyCodeLine{02114\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&=\ \string~TIM\_CCMR2\_IC3PSC)\ :\(\backslash\)}}
\DoxyCodeLine{02115\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCMR2\ \&=\ \string~TIM\_CCMR2\_IC4PSC))}}
\DoxyCodeLine{02116\ }
\DoxyCodeLine{02117\ \textcolor{preprocessor}{\#define\ TIM\_SET\_CAPTUREPOLARITY(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_,\ \_\_POLARITY\_\_)\ \(\backslash\)}}
\DoxyCodeLine{02118\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ |=\ (\_\_POLARITY\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02119\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ |=\ ((\_\_POLARITY\_\_)\ <<\ 4U))\ :\(\backslash\)}}
\DoxyCodeLine{02120\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ |=\ ((\_\_POLARITY\_\_)\ <<\ 8U))\ :\(\backslash\)}}
\DoxyCodeLine{02121\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ |=\ (((\_\_POLARITY\_\_)\ <<\ 12U))))}}
\DoxyCodeLine{02122\ }
\DoxyCodeLine{02123\ \textcolor{preprocessor}{\#define\ TIM\_RESET\_CAPTUREPOLARITY(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\ \(\backslash\)}}
\DoxyCodeLine{02124\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&=\ \string~(TIM\_CCER\_CC1P\ |\ TIM\_CCER\_CC1NP))\ :\(\backslash\)}}
\DoxyCodeLine{02125\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&=\ \string~(TIM\_CCER\_CC2P\ |\ TIM\_CCER\_CC2NP))\ :\(\backslash\)}}
\DoxyCodeLine{02126\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&=\ \string~(TIM\_CCER\_CC3P\ |\ TIM\_CCER\_CC3NP))\ :\(\backslash\)}}
\DoxyCodeLine{02127\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>Instance-\/>CCER\ \&=\ \string~(TIM\_CCER\_CC4P\ |\ TIM\_CCER\_CC4NP)))}}
\DoxyCodeLine{02128\ }
\DoxyCodeLine{02129\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_STATE\_GET(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\(\backslash\)}}
\DoxyCodeLine{02130\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelState[0]\ :\(\backslash\)}}
\DoxyCodeLine{02131\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelState[1]\ :\(\backslash\)}}
\DoxyCodeLine{02132\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelState[2]\ :\(\backslash\)}}
\DoxyCodeLine{02133\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelState[3]\ :\(\backslash\)}}
\DoxyCodeLine{02134\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelState[4]\ :\(\backslash\)}}
\DoxyCodeLine{02135\ \textcolor{preprocessor}{\ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[5])}}
\DoxyCodeLine{02136\ }
\DoxyCodeLine{02137\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_STATE\_SET(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_,\ \_\_CHANNEL\_STATE\_\_)\ \(\backslash\)}}
\DoxyCodeLine{02138\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelState[0]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02139\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelState[1]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02140\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelState[2]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02141\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_4)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelState[3]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02142\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_5)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelState[4]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02143\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>ChannelState[5]\ =\ (\_\_CHANNEL\_STATE\_\_)))}}
\DoxyCodeLine{02144\ }
\DoxyCodeLine{02145\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_STATE\_SET\_ALL(\_\_HANDLE\_\_,\ \ \_\_CHANNEL\_STATE\_\_)\ do\ \{\ \(\backslash\)}}
\DoxyCodeLine{02146\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[0]\ \ =\ \(\backslash\)}}
\DoxyCodeLine{02147\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02148\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[1]\ \ =\ \(\backslash\)}}
\DoxyCodeLine{02149\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02150\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[2]\ \ =\ \(\backslash\)}}
\DoxyCodeLine{02151\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02152\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[3]\ \ =\ \(\backslash\)}}
\DoxyCodeLine{02153\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02154\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[4]\ \ =\ \(\backslash\)}}
\DoxyCodeLine{02155\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02156\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelState[5]\ \ =\ \(\backslash\)}}
\DoxyCodeLine{02157\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02158\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \}\ while(0)}}
\DoxyCodeLine{02159\ }
\DoxyCodeLine{02160\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_N\_STATE\_GET(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_)\(\backslash\)}}
\DoxyCodeLine{02161\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelNState[0]\ :\(\backslash\)}}
\DoxyCodeLine{02162\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelNState[1]\ :\(\backslash\)}}
\DoxyCodeLine{02163\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ (\_\_HANDLE\_\_)-\/>ChannelNState[2]\ :\(\backslash\)}}
\DoxyCodeLine{02164\ \textcolor{preprocessor}{\ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[3])}}
\DoxyCodeLine{02165\ }
\DoxyCodeLine{02166\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_N\_STATE\_SET(\_\_HANDLE\_\_,\ \_\_CHANNEL\_\_,\ \_\_CHANNEL\_STATE\_\_)\ \(\backslash\)}}
\DoxyCodeLine{02167\ \textcolor{preprocessor}{\ \ (((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_1)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelNState[0]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02168\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_2)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelNState[1]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02169\ \textcolor{preprocessor}{\ \ \ ((\_\_CHANNEL\_\_)\ ==\ TIM\_CHANNEL\_3)\ ?\ ((\_\_HANDLE\_\_)-\/>ChannelNState[2]\ =\ (\_\_CHANNEL\_STATE\_\_))\ :\(\backslash\)}}
\DoxyCodeLine{02170\ \textcolor{preprocessor}{\ \ \ ((\_\_HANDLE\_\_)-\/>ChannelNState[3]\ =\ (\_\_CHANNEL\_STATE\_\_)))}}
\DoxyCodeLine{02171\ }
\DoxyCodeLine{02172\ \textcolor{preprocessor}{\#define\ TIM\_CHANNEL\_N\_STATE\_SET\_ALL(\_\_HANDLE\_\_,\ \ \_\_CHANNEL\_STATE\_\_)\ do\ \{\ \(\backslash\)}}
\DoxyCodeLine{02173\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[0]\ =\ \(\backslash\)}}
\DoxyCodeLine{02174\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02175\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[1]\ =\ \(\backslash\)}}
\DoxyCodeLine{02176\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02177\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[2]\ =\ \(\backslash\)}}
\DoxyCodeLine{02178\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02179\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_HANDLE\_\_)-\/>ChannelNState[3]\ =\ \(\backslash\)}}
\DoxyCodeLine{02180\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (\_\_CHANNEL\_STATE\_\_);\ \ \(\backslash\)}}
\DoxyCodeLine{02181\ \textcolor{preprocessor}{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \}\ while(0)}}
\DoxyCodeLine{02182\ }
\DoxyCodeLine{02186\ \textcolor{comment}{/*\ End\ of\ private\ macros\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{02187\ }
\DoxyCodeLine{02188\ \textcolor{comment}{/*\ Include\ TIM\ HAL\ Extended\ module\ */}}
\DoxyCodeLine{02189\ \textcolor{preprocessor}{\#include\ "{}\mbox{\hyperlink{stm32h7xx__hal__tim__ex_8h}{stm32h7xx\_hal\_tim\_ex.h}}"{}}}
\DoxyCodeLine{02190\ }
\DoxyCodeLine{02191\ \textcolor{comment}{/*\ Exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{02195\ }
\DoxyCodeLine{02200\ \textcolor{comment}{/*\ Time\ Base\ functions\ ********************************************************/}}
\DoxyCodeLine{02201\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_Init(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02202\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_DeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02203\ \textcolor{keywordtype}{void}\ HAL\_TIM\_Base\_MspInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02204\ \textcolor{keywordtype}{void}\ HAL\_TIM\_Base\_MspDeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02205\ \textcolor{comment}{/*\ Blocking\ mode:\ Polling\ */}}
\DoxyCodeLine{02206\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_Start(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02207\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_Stop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02208\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ Interrupt\ */}}
\DoxyCodeLine{02209\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_Start\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02210\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_Stop\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02211\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ DMA\ */}}
\DoxyCodeLine{02212\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_Start\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ uint32\_t\ *pData,\ uint16\_t\ Length);}
\DoxyCodeLine{02213\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Base\_Stop\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02217\ }
\DoxyCodeLine{02222\ \textcolor{comment}{/*\ Timer\ Output\ Compare\ functions\ *********************************************/}}
\DoxyCodeLine{02223\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_Init(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02224\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_DeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02225\ \textcolor{keywordtype}{void}\ HAL\_TIM\_OC\_MspInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02226\ \textcolor{keywordtype}{void}\ HAL\_TIM\_OC\_MspDeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02227\ \textcolor{comment}{/*\ Blocking\ mode:\ Polling\ */}}
\DoxyCodeLine{02228\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_Start(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02229\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_Stop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02230\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ Interrupt\ */}}
\DoxyCodeLine{02231\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_Start\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02232\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_Stop\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02233\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ DMA\ */}}
\DoxyCodeLine{02234\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_Start\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel,\ \textcolor{keyword}{const}\ uint32\_t\ *pData,}
\DoxyCodeLine{02235\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint16\_t\ Length);}
\DoxyCodeLine{02236\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_Stop\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02240\ }
\DoxyCodeLine{02245\ \textcolor{comment}{/*\ Timer\ PWM\ functions\ ********************************************************/}}
\DoxyCodeLine{02246\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_Init(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02247\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_DeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02248\ \textcolor{keywordtype}{void}\ HAL\_TIM\_PWM\_MspInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02249\ \textcolor{keywordtype}{void}\ HAL\_TIM\_PWM\_MspDeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02250\ \textcolor{comment}{/*\ Blocking\ mode:\ Polling\ */}}
\DoxyCodeLine{02251\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_Start(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02252\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_Stop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02253\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ Interrupt\ */}}
\DoxyCodeLine{02254\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_Start\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02255\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_Stop\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02256\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ DMA\ */}}
\DoxyCodeLine{02257\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_Start\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel,\ \textcolor{keyword}{const}\ uint32\_t\ *pData,}
\DoxyCodeLine{02258\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint16\_t\ Length);}
\DoxyCodeLine{02259\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_Stop\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02263\ }
\DoxyCodeLine{02268\ \textcolor{comment}{/*\ Timer\ Input\ Capture\ functions\ **********************************************/}}
\DoxyCodeLine{02269\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_Init(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02270\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_DeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02271\ \textcolor{keywordtype}{void}\ HAL\_TIM\_IC\_MspInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02272\ \textcolor{keywordtype}{void}\ HAL\_TIM\_IC\_MspDeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02273\ \textcolor{comment}{/*\ Blocking\ mode:\ Polling\ */}}
\DoxyCodeLine{02274\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_Start(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02275\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_Stop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02276\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ Interrupt\ */}}
\DoxyCodeLine{02277\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_Start\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02278\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_Stop\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02279\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ DMA\ */}}
\DoxyCodeLine{02280\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_Start\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel,\ uint32\_t\ *pData,\ uint16\_t\ Length);}
\DoxyCodeLine{02281\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_Stop\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02285\ }
\DoxyCodeLine{02290\ \textcolor{comment}{/*\ Timer\ One\ Pulse\ functions\ **************************************************/}}
\DoxyCodeLine{02291\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OnePulse\_Init(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ OnePulseMode);}
\DoxyCodeLine{02292\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OnePulse\_DeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02293\ \textcolor{keywordtype}{void}\ HAL\_TIM\_OnePulse\_MspInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02294\ \textcolor{keywordtype}{void}\ HAL\_TIM\_OnePulse\_MspDeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02295\ \textcolor{comment}{/*\ Blocking\ mode:\ Polling\ */}}
\DoxyCodeLine{02296\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OnePulse\_Start(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ OutputChannel);}
\DoxyCodeLine{02297\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OnePulse\_Stop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ OutputChannel);}
\DoxyCodeLine{02298\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ Interrupt\ */}}
\DoxyCodeLine{02299\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OnePulse\_Start\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ OutputChannel);}
\DoxyCodeLine{02300\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OnePulse\_Stop\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ OutputChannel);}
\DoxyCodeLine{02304\ }
\DoxyCodeLine{02309\ \textcolor{comment}{/*\ Timer\ Encoder\ functions\ ****************************************************/}}
\DoxyCodeLine{02310\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_Init(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___encoder___init_type_def}{TIM\_Encoder\_InitTypeDef}}\ *sConfig);}
\DoxyCodeLine{02311\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_DeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02312\ \textcolor{keywordtype}{void}\ HAL\_TIM\_Encoder\_MspInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02313\ \textcolor{keywordtype}{void}\ HAL\_TIM\_Encoder\_MspDeInit(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02314\ \textcolor{comment}{/*\ Blocking\ mode:\ Polling\ */}}
\DoxyCodeLine{02315\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_Start(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02316\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_Stop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02317\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ Interrupt\ */}}
\DoxyCodeLine{02318\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_Start\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02319\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_Stop\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02320\ \textcolor{comment}{/*\ Non-\/Blocking\ mode:\ DMA\ */}}
\DoxyCodeLine{02321\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_Start\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel,\ uint32\_t\ *pData1,}
\DoxyCodeLine{02322\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ *pData2,\ uint16\_t\ Length);}
\DoxyCodeLine{02323\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_Encoder\_Stop\_DMA(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02327\ }
\DoxyCodeLine{02332\ \textcolor{comment}{/*\ Interrupt\ Handler\ functions\ \ ***********************************************/}}
\DoxyCodeLine{02333\ \textcolor{keywordtype}{void}\ HAL\_TIM\_IRQHandler(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02337\ }
\DoxyCodeLine{02342\ \textcolor{comment}{/*\ Control\ functions\ \ *********************************************************/}}
\DoxyCodeLine{02343\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OC\_ConfigChannel(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def}{TIM\_OC\_InitTypeDef}}\ *sConfig,}
\DoxyCodeLine{02344\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ Channel);}
\DoxyCodeLine{02345\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_PWM\_ConfigChannel(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def}{TIM\_OC\_InitTypeDef}}\ *sConfig,}
\DoxyCodeLine{02346\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ Channel);}
\DoxyCodeLine{02347\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_IC\_ConfigChannel(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___i_c___init_type_def}{TIM\_IC\_InitTypeDef}}\ *sConfig,}
\DoxyCodeLine{02348\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ Channel);}
\DoxyCodeLine{02349\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_OnePulse\_ConfigChannel(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \mbox{\hyperlink{struct_t_i_m___one_pulse___init_type_def}{TIM\_OnePulse\_InitTypeDef}}\ *sConfig,}
\DoxyCodeLine{02350\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ OutputChannel,\ \ uint32\_t\ InputChannel);}
\DoxyCodeLine{02351\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_ConfigOCrefClear(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,}
\DoxyCodeLine{02352\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___clear_input_config_type_def}{TIM\_ClearInputConfigTypeDef}}\ *sClearInputConfig,}
\DoxyCodeLine{02353\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ Channel);}
\DoxyCodeLine{02354\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_ConfigClockSource(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___clock_config_type_def}{TIM\_ClockConfigTypeDef}}\ *sClockSourceConfig);}
\DoxyCodeLine{02355\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_ConfigTI1Input(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ TI1\_Selection);}
\DoxyCodeLine{02356\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_SlaveConfigSynchro(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def}{TIM\_SlaveConfigTypeDef}}\ *sSlaveConfig);}
\DoxyCodeLine{02357\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_SlaveConfigSynchro\_IT(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___slave_config_type_def}{TIM\_SlaveConfigTypeDef}}\ *sSlaveConfig);}
\DoxyCodeLine{02358\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_DMABurst\_WriteStart(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ BurstBaseAddress,}
\DoxyCodeLine{02359\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ BurstRequestSrc,\ \textcolor{keyword}{const}\ uint32\_t\ \ *BurstBuffer,}
\DoxyCodeLine{02360\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ \ BurstLength);}
\DoxyCodeLine{02361\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_DMABurst\_MultiWriteStart(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ BurstBaseAddress,}
\DoxyCodeLine{02362\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ BurstRequestSrc,\ \textcolor{keyword}{const}\ uint32\_t\ *BurstBuffer,}
\DoxyCodeLine{02363\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ BurstLength,\ \ uint32\_t\ DataLength);}
\DoxyCodeLine{02364\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_DMABurst\_WriteStop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ BurstRequestSrc);}
\DoxyCodeLine{02365\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_DMABurst\_ReadStart(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ BurstBaseAddress,}
\DoxyCodeLine{02366\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ BurstRequestSrc,\ uint32\_t\ \ *BurstBuffer,\ uint32\_t\ \ BurstLength);}
\DoxyCodeLine{02367\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_DMABurst\_MultiReadStart(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ BurstBaseAddress,}
\DoxyCodeLine{02368\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ BurstRequestSrc,\ uint32\_t\ \ *BurstBuffer,}
\DoxyCodeLine{02369\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ \ BurstLength,\ uint32\_t\ \ DataLength);}
\DoxyCodeLine{02370\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_DMABurst\_ReadStop(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ BurstRequestSrc);}
\DoxyCodeLine{02371\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_GenerateEvent(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ EventSource);}
\DoxyCodeLine{02372\ uint32\_t\ HAL\_TIM\_ReadCapturedValue(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ uint32\_t\ Channel);}
\DoxyCodeLine{02376\ }
\DoxyCodeLine{02381\ \textcolor{comment}{/*\ Callback\ in\ non\ blocking\ modes\ (Interrupt\ and\ DMA)\ *************************/}}
\DoxyCodeLine{02382\ \textcolor{keywordtype}{void}\ \mbox{\hyperlink{group___t_i_m___exported___functions___group9_ga8a3b0ad512a6e6c6157440b68d395eac}{HAL\_TIM\_PeriodElapsedCallback}}(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02383\ \textcolor{keywordtype}{void}\ HAL\_TIM\_PeriodElapsedHalfCpltCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02384\ \textcolor{keywordtype}{void}\ HAL\_TIM\_OC\_DelayElapsedCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02385\ \textcolor{keywordtype}{void}\ HAL\_TIM\_IC\_CaptureCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02386\ \textcolor{keywordtype}{void}\ HAL\_TIM\_IC\_CaptureHalfCpltCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02387\ \textcolor{keywordtype}{void}\ \mbox{\hyperlink{group___t_i_m___exported___functions___group9_ga07e5fc4d223b16bec2fd6bed547cf91d}{HAL\_TIM\_PWM\_PulseFinishedCallback}}(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02388\ \textcolor{keywordtype}{void}\ HAL\_TIM\_PWM\_PulseFinishedHalfCpltCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02389\ \textcolor{keywordtype}{void}\ HAL\_TIM\_TriggerCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02390\ \textcolor{keywordtype}{void}\ HAL\_TIM\_TriggerHalfCpltCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02391\ \textcolor{keywordtype}{void}\ HAL\_TIM\_ErrorCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02392\ }
\DoxyCodeLine{02393\ \textcolor{comment}{/*\ Callbacks\ Register/UnRegister\ functions\ \ ***********************************/}}
\DoxyCodeLine{02394\ \textcolor{preprocessor}{\#if\ (USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ ==\ 1)}}
\DoxyCodeLine{02395\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_RegisterCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ HAL\_TIM\_CallbackIDTypeDef\ CallbackID,}
\DoxyCodeLine{02396\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ pTIM\_CallbackTypeDef\ pCallback);}
\DoxyCodeLine{02397\ \mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\_StatusTypeDef}}\ HAL\_TIM\_UnRegisterCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ HAL\_TIM\_CallbackIDTypeDef\ CallbackID);}
\DoxyCodeLine{02398\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02399\ }
\DoxyCodeLine{02403\ }
\DoxyCodeLine{02408\ \textcolor{comment}{/*\ Peripheral\ State\ functions\ \ ************************************************/}}
\DoxyCodeLine{02409\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}}\ HAL\_TIM\_Base\_GetState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02410\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}}\ HAL\_TIM\_OC\_GetState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02411\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}}\ HAL\_TIM\_PWM\_GetState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02412\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}}\ HAL\_TIM\_IC\_GetState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02413\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}}\ HAL\_TIM\_OnePulse\_GetState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02414\ \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\_TIM\_StateTypeDef}}\ HAL\_TIM\_Encoder\_GetState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02415\ }
\DoxyCodeLine{02416\ \textcolor{comment}{/*\ Peripheral\ Channel\ state\ functions\ \ ************************************************/}}
\DoxyCodeLine{02417\ \mbox{\hyperlink{group___t_i_m___exported___types_gaa3fa7bcbb4707f1151ccfc90a8cf9706}{HAL\_TIM\_ActiveChannel}}\ HAL\_TIM\_GetActiveChannel(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02418\ \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\_TIM\_ChannelStateTypeDef}}\ HAL\_TIM\_GetChannelState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim,\ \ uint32\_t\ Channel);}
\DoxyCodeLine{02419\ \mbox{\hyperlink{group___t_i_m___exported___types_ga9b87df539778a60ea940a9d5ba793f7c}{HAL\_TIM\_DMABurstStateTypeDef}}\ HAL\_TIM\_DMABurstState(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02423\ }
\DoxyCodeLine{02427\ \textcolor{comment}{/*\ End\ of\ exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{02428\ }
\DoxyCodeLine{02429\ \textcolor{comment}{/*\ Private\ functions-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{02433\ \textcolor{keywordtype}{void}\ TIM\_Base\_SetConfig(\mbox{\hyperlink{struct_t_i_m___type_def}{TIM\_TypeDef}}\ *TIMx,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___base___init_type_def}{TIM\_Base\_InitTypeDef}}\ *Structure);}
\DoxyCodeLine{02434\ \textcolor{keywordtype}{void}\ TIM\_TI1\_SetConfig(\mbox{\hyperlink{struct_t_i_m___type_def}{TIM\_TypeDef}}\ *TIMx,\ uint32\_t\ TIM\_ICPolarity,\ uint32\_t\ TIM\_ICSelection,\ uint32\_t\ TIM\_ICFilter);}
\DoxyCodeLine{02435\ \textcolor{keywordtype}{void}\ TIM\_OC2\_SetConfig(\mbox{\hyperlink{struct_t_i_m___type_def}{TIM\_TypeDef}}\ *TIMx,\ \textcolor{keyword}{const}\ \mbox{\hyperlink{struct_t_i_m___o_c___init_type_def}{TIM\_OC\_InitTypeDef}}\ *OC\_Config);}
\DoxyCodeLine{02436\ \textcolor{keywordtype}{void}\ TIM\_ETR\_SetConfig(\mbox{\hyperlink{struct_t_i_m___type_def}{TIM\_TypeDef}}\ *TIMx,\ uint32\_t\ TIM\_ExtTRGPrescaler,}
\DoxyCodeLine{02437\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ TIM\_ExtTRGPolarity,\ uint32\_t\ ExtTRGFilter);}
\DoxyCodeLine{02438\ }
\DoxyCodeLine{02439\ \textcolor{keywordtype}{void}\ TIM\_DMADelayPulseHalfCplt(\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\_HandleTypeDef}}\ *hdma);}
\DoxyCodeLine{02440\ \textcolor{keywordtype}{void}\ TIM\_DMAError(\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\_HandleTypeDef}}\ *hdma);}
\DoxyCodeLine{02441\ \textcolor{keywordtype}{void}\ TIM\_DMACaptureCplt(\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\_HandleTypeDef}}\ *hdma);}
\DoxyCodeLine{02442\ \textcolor{keywordtype}{void}\ TIM\_DMACaptureHalfCplt(\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\_HandleTypeDef}}\ *hdma);}
\DoxyCodeLine{02443\ \textcolor{keywordtype}{void}\ TIM\_CCxChannelCmd(\mbox{\hyperlink{struct_t_i_m___type_def}{TIM\_TypeDef}}\ *TIMx,\ uint32\_t\ Channel,\ uint32\_t\ ChannelState);}
\DoxyCodeLine{02444\ }
\DoxyCodeLine{02445\ \textcolor{preprocessor}{\#if\ (USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ ==\ 1)}}
\DoxyCodeLine{02446\ \textcolor{keywordtype}{void}\ TIM\_ResetCallback(\mbox{\hyperlink{struct_t_i_m___handle_type_def}{TIM\_HandleTypeDef}}\ *htim);}
\DoxyCodeLine{02447\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_HAL\_TIM\_REGISTER\_CALLBACKS\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02448\ }
\DoxyCodeLine{02452\ \textcolor{comment}{/*\ End\ of\ private\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{02453\ }
\DoxyCodeLine{02457\ }
\DoxyCodeLine{02461\ }
\DoxyCodeLine{02462\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{02463\ \}}
\DoxyCodeLine{02464\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{02465\ }
\DoxyCodeLine{02466\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ STM32H7xx\_HAL\_TIM\_H\ */}\textcolor{preprocessor}{}}

\end{DoxyCode}
